Subject: CVS commit: src
To: None <>
From: Tohru Nishimura <>
List: source-changes
Date: 05/20/1999 23:01:15
Module Name:	src
Committed By:	nisimura
Date:		Fri May 21 06:01:15 UTC 1999

Modified Files:
	src/sys/arch/mips/mips: locore_mips1.S
Log Message:
- Now completing MIPS1 side change.  Introduce MIPS_TBIS and MIPS_TBDATA
(correct name, vax?) replacing mips1_TLBFlushAddr and mips1_TLBUpdate,
respectively.  New codes always use current ASID holded in EntryHi
register.  In most occations, the register already contains a necessary
value before (re-)written, ugh.  'sva | asid' ops for their arguments are
now verbose, to be removed when MIPS3 side changes are done.