Module Name:	src
Committed By:	nisimura
Date:		Mon Apr 26 09:42:15 UTC 1999

Modified Files:
	src/sys/arch/mips/include: cpuregs.h
Log Message:
- MIPS processors do not impose inclusive (nesting) interrupt levels with
their interrupt lines.  The notion and implemention of 'spl' are left
for how target ports approach to it.