Subject: CVS commit: src
To: None <>
From: Ross Harvey <>
List: source-changes
Date: 10/01/1998 15:57:30
Module Name:	src
Committed By:	ross
Date:		Thu Oct  1 22:57:30 UTC 1998

Modified Files:
	src/sys/arch/alpha/tlsb: tlsb.c
Log Message:
If not MULTIPROCESSOR then identify the interrupt target cpu by hwrpb id (%d)
rather than attachment name, and hence avoid referencing `cpus'.