Subject: CVS commit: src
To: None <>
From: Jonathan Stone <>
List: source-changes
Date: 09/11/1998 09:46:35
Module Name:	src
Committed By:	jonathan
Date:		Fri Sep 11 16:46:34 UTC 1998

Modified Files:
	src/sys/arch/mips/include: cpu.h cpuregs.h locore.h mips3_pte.h
	    mips_param.h profile.h psl.h stdarg.h varargs.h
	src/sys/arch/mips/mips: locore.S locore_r2000.S locore_r4000.S
	    mips_machdep.c pmap.c trap.c
	src/sys/arch/pmax/pmax: locore_machdep.S
Added Files:
	src/sys/lib/libkern/arch/mips: memcpy.S
Log Message:
Changes to sys/arch/mips from ARC port, from Noriyuki Soda <>.
Adds (most) support for ARC platform to port-independent mips code.

Some changes (e.g., clean up of overlapping CPU/FPU ids) inspired by
comparison to the OpenBSD 2.1 codebase of Soda's ARC port.

Open issues:
* Still no support for r4600 or mipsIV CPUs with two-way L1 cache.
Code derived from Per Fogelstrom's OpenBSD source  doesn't work
on mips3 pmaxes with L2 cache.

* Still some port-specific  #ifdefs, for interrupt enable and
pmax L2 cache-size.  Needs more thought, but overlaps with
work-in-progress by Tohru and Tsubai on spl()s and related stuff.