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[src/trunk]: src/sys/arch/riscv/include Pad the trapframe so it's a multiple ...



details:   https://anonhg.NetBSD.org/src/rev/529b13452ce8
branches:  trunk
changeset: 376595:529b13452ce8
user:      skrll <skrll%NetBSD.org@localhost>
date:      Fri Jun 23 12:11:22 2023 +0000

description:
Pad the trapframe so it's a multiple of 16 bytes so that when a trapframe
is created on the stack SP remains 16-byte aligned as per the ABI
requirements.

Patch from Rin with some updates from me.

diffstat:

 sys/arch/riscv/include/frame.h |  11 +++++++++--
 1 files changed, 9 insertions(+), 2 deletions(-)

diffs (43 lines):

diff -r 65e66ea0486b -r 529b13452ce8 sys/arch/riscv/include/frame.h
--- a/sys/arch/riscv/include/frame.h    Fri Jun 23 10:27:12 2023 +0000
+++ b/sys/arch/riscv/include/frame.h    Fri Jun 23 12:11:22 2023 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: frame.h,v 1.5 2023/05/07 12:41:48 skrll Exp $ */
+/* $NetBSD: frame.h,v 1.6 2023/06/23 12:11:22 skrll Exp $ */
 
 /*-
  * Copyright (c) 2014 The NetBSD Foundation, Inc.
@@ -39,6 +39,7 @@ struct trapframe {
        register_t tf_tval;             // supervisor trap value
        register_t tf_cause;            // supervisor cause register
        register_t tf_sr;               // supervisor status register
+       register_t tf_pad;              // For 16-byte alignment
 #define tf_reg         tf_regs.r_reg
 #define tf_pc          tf_regs.r_pc
 #define tf_ra          tf_reg[_X_RA]
@@ -74,6 +75,12 @@ struct trapframe {
 #define tf_t6          tf_reg[_X_T6]
 };
 
+/*
+ * Ensure the trapframe is a multiple of 16bytes so that stack
+ * alignment is preserved.
+ */
+__CTASSERT((sizeof(struct trapframe) & (16 - 1)) == 0);
+
 #ifdef _LP64
 // For COMPAT_NETBSD32 coredumps
 struct trapframe32 {
@@ -81,11 +88,11 @@ struct trapframe32 {
        register32_t tf_tval;
        register32_t tf_cause;
        register32_t tf_sr;
+       register32_t tf_pad;
 };
 #endif
 
 
-
 #define lwp_trapframe(l) ((l)->l_md.md_utf)
 
 



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