Source-Changes-HG archive

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index][Old Index]

[src/netbsd-9]: src/sys/arch/dreamcast/dev/microcode Pull up following revisi...



details:   https://anonhg.NetBSD.org/src/rev/25963a1da60c
branches:  netbsd-9
changeset: 374352:25963a1da60c
user:      martin <martin%NetBSD.org@localhost>
date:      Thu Apr 20 14:08:07 2023 +0000

description:
Pull up following revision(s) (requested by tsutsui in ticket #1628):

        sys/arch/dreamcast/dev/microcode/aica_armcode.h: revision 1.5
        sys/arch/dreamcast/dev/microcode/aica_arm_locore.S: revision 1.4
        sys/arch/dreamcast/dev/microcode/aica_arm_locore.S: revision 1.5
        sys/arch/dreamcast/dev/microcode/Makefile: revision 1.6
        sys/arch/dreamcast/dev/microcode/aica_arm.c: revision 1.7
        sys/arch/dreamcast/dev/microcode/aica_arm.c: revision 1.8

arm side of aica(4) sometimes became unresponsive when audioplay was performed several times.
- disabled data cache at startup.
- compiled with cross-arm-none-eabi-gcc-8.3.0nb4 of pkg.
- added memset() in asm because gcc8 (and later) detects the zero clear part in
  own bzero function and calls memset internally, and bzero were replaced with memset.
improve comment, update mailaddr, and remove clause 3 from my licenses.

diffstat:

 sys/arch/dreamcast/dev/microcode/Makefile          |     9 +-
 sys/arch/dreamcast/dev/microcode/aica_arm.c        |    49 +-
 sys/arch/dreamcast/dev/microcode/aica_arm_locore.S |    42 +-
 sys/arch/dreamcast/dev/microcode/aica_armcode.h    |  2190 +++++++++----------
 4 files changed, 1138 insertions(+), 1152 deletions(-)

diffs (truncated from 2407 to 300 lines):

diff -r 4990bc397415 -r 25963a1da60c sys/arch/dreamcast/dev/microcode/Makefile
--- a/sys/arch/dreamcast/dev/microcode/Makefile Thu Apr 20 13:47:02 2023 +0000
+++ b/sys/arch/dreamcast/dev/microcode/Makefile Thu Apr 20 14:08:07 2023 +0000
@@ -1,15 +1,16 @@
-#      $NetBSD: Makefile,v 1.5 2019/05/06 17:12:50 ryo Exp $
+#      $NetBSD: Makefile,v 1.5.2.1 2023/04/20 14:08:07 martin Exp $
 
 S      = ${.CURDIR}/../../../..
 
-CC     = ${TOOLDIR}/bin/arm--netbsdelf-gcc
-OBJCOPY        = ${TOOLDIR}/bin/arm--netbsdelf-objcopy
+TOOLDIR        ?= /usr/pkg/cross-arm-none-eabi
+
+CC     = ${TOOLDIR}/bin/arm-none-eabi-gcc
+OBJCOPY        = ${TOOLDIR}/bin/arm-none-eabi-objcopy
 
 CFLAGS = -W -Wall -mlittle-endian
 CFLAGS += -O3 -mcpu=arm7
 CFLAGS += -fomit-frame-pointer -funroll-loops -finline-functions
 CFLAGS += -I${S}
-#AFLAGS        = -mcpu=arm7tdmi -mthumb -mthumb-interwork -mapcs-32
 
 all: aica_armcode.h
 
diff -r 4990bc397415 -r 25963a1da60c sys/arch/dreamcast/dev/microcode/aica_arm.c
--- a/sys/arch/dreamcast/dev/microcode/aica_arm.c       Thu Apr 20 13:47:02 2023 +0000
+++ b/sys/arch/dreamcast/dev/microcode/aica_arm.c       Thu Apr 20 14:08:07 2023 +0000
@@ -1,7 +1,7 @@
-/*     $NetBSD: aica_arm.c,v 1.6 2019/05/06 17:12:50 ryo Exp $ */
+/*     $NetBSD: aica_arm.c,v 1.6.2.1 2023/04/20 14:08:07 martin Exp $  */
 
 /*
- * Copyright (c) 2003 SHIMIZU Ryo <ryo%misakimix.org@localhost>
+ * Copyright (c) 2003 Ryo Shimizu <ryo%nerv.org@localhost>
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
@@ -13,8 +13,6 @@
  * 2. Redistributions in binary form must reproduce the above copyright
  *    notice, this list of conditions and the following disclaimer in the
  *    documentation and/or other materials provided with the distribution.
- * 3. The name of the author may not be used to endorse or promote products
- *    derived from this software without specific prior written permission.
  *
  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
@@ -56,11 +54,11 @@ typedef     unsigned long   uint32_t;
 #define        CH_WRITE_2(ch,off,val)  REG_WRITE_2(((ch) << 7) + (off), val)
 #define        CH_WRITE_4(ch,off,val)  REG_WRITE_4(((ch) << 7) + (off), val)
 
+void *memset(void *, int, unsigned long);
+
 void aica_init(void);
 inline int in_first_half(unsigned int);
 inline int in_second_half(unsigned int);
-void bzero_4(void *, unsigned int);
-void bzero(void *, unsigned int);
 uint32_t rate2reg(unsigned int);
 void aica_stop(void);
 void aica_main(void);
@@ -120,29 +118,6 @@ in_second_half(unsigned int loophalf)
        return REG_READ_4(0x2814) >= loophalf;
 }
 
-
-void
-bzero_4(void *b, unsigned int len)
-{
-       uint32_t *p;
-
-       p = b;
-       len = (len + 3) & ~3;
-       for (; len != 0; len -= 4)
-               *p++ = 0;
-}
-
-void
-bzero(void *b,unsigned int len)
-{
-       uint8_t *p;
-
-       p = b;
-       for (; len != 0; len--)
-               *p++ = 0;
-}
-
-
 uint32_t
 rate2reg(unsigned int rate)
 {
@@ -197,8 +172,8 @@ aica_stop(void)
 
        CH_WRITE_4(0, 0x00, 0x8000);
        CH_WRITE_4(1, 0x00, 0x8000);
-       bzero_4((void *)AICA_DMABUF_LEFT, AICA_DMABUF_SIZE);
-       bzero_4((void *)AICA_DMABUF_RIGHT, AICA_DMABUF_SIZE);
+       memset((void *)AICA_DMABUF_LEFT, 0, AICA_DMABUF_SIZE);
+       memset((void *)AICA_DMABUF_RIGHT, 0, AICA_DMABUF_SIZE);
 }
 
 void
@@ -214,8 +189,8 @@ aica_main(void)
 
        REG_WRITE_4(0x28b4, 0x0020);    /* INT Enable to SH4 */
 
-       bzero_4((void *)AICA_DMABUF_LEFT, AICA_DMABUF_SIZE);
-       bzero_4((void *)AICA_DMABUF_RIGHT, AICA_DMABUF_SIZE);
+       memset((void *)AICA_DMABUF_LEFT, 0, AICA_DMABUF_SIZE);
+       memset((void *)AICA_DMABUF_RIGHT, 0, AICA_DMABUF_SIZE);
 
        play_state = 0;
        serial = aicacmd->serial = 0;
@@ -348,15 +323,15 @@ aica_main(void)
                case AICA_COMMAND_STOP:
                        switch (play_state) {
                        case 1:
-                               bzero_4((void *)(AICA_DMABUF_LEFT + blksize),
+                               memset((void *)(AICA_DMABUF_LEFT + blksize), 0,
                                    blksize);
-                               bzero_4((void *)(AICA_DMABUF_RIGHT + blksize),
+                               memset((void *)(AICA_DMABUF_RIGHT + blksize), 0,
                                    blksize);
                                play_state = 3;
                                break;
                        case 2:
-                               bzero_4((void *)AICA_DMABUF_LEFT, blksize);
-                               bzero_4((void *)AICA_DMABUF_RIGHT, blksize);
+                               memset((void *)AICA_DMABUF_LEFT, 0, blksize);
+                               memset((void *)AICA_DMABUF_RIGHT, 0, blksize);
                                play_state = 4;
                                break;
                        default:
diff -r 4990bc397415 -r 25963a1da60c sys/arch/dreamcast/dev/microcode/aica_arm_locore.S
--- a/sys/arch/dreamcast/dev/microcode/aica_arm_locore.S        Thu Apr 20 13:47:02 2023 +0000
+++ b/sys/arch/dreamcast/dev/microcode/aica_arm_locore.S        Thu Apr 20 14:08:07 2023 +0000
@@ -1,7 +1,7 @@
-/*     $NetBSD: aica_arm_locore.S,v 1.3 2019/05/06 17:12:50 ryo Exp $  */
+/*     $NetBSD: aica_arm_locore.S,v 1.3.2.1 2023/04/20 14:08:07 martin Exp $   */
 
 /*
- * Copyright (c) 2003 SHIMIZU Ryo <ryo%misakimix.org@localhost>
+ * Copyright (c) 2003 Ryo Shimizu <ryo%nerv.org@localhost>
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
@@ -13,8 +13,6 @@
  * 2. Redistributions in binary form must reproduce the above copyright
  *    notice, this list of conditions and the following disclaimer in the
  *    documentation and/or other materials provided with the distribution.
- * 3. The name of the author may not be used to endorse or promote products
- *    derived from this software without specific prior written permission.
  *
  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
@@ -45,10 +43,15 @@ exp_reset:
        mov     sp,#0xff00      /* setup stack */
 
        mrs     r0,CPSR         /* disable interrupt */
-       bic     r0,r0,#0x80
-       bic     r0,r0,#0x40
+       bic     r0,r0,#0x80     /* disable IRQ */
+       bic     r0,r0,#0x40     /* disbale FIQ */
        msr     CPSR_all,r0
 
+       mrc     p15,0,r0,c1,c0,0        /* read control register */
+       bic     r0,r0,#0x0004           /* DC disable */
+       orr     r0,r0,#0x1000           /* IC enable */
+       mcr     p15,0,r0,c1,c0,0        /* write control register */
+
        bl      aica_main
 
 exp_reserved:
@@ -69,3 +72,30 @@ exp_swi:
 exp_undef:
        mov     pc,r14
 
+       .global memset
+/* memset(void *b:r0, int c:r1, size_t len:r2) */
+memset:
+       /* optimized only if c == 0 and b is 4-byte aligned. */
+       and     r3,r0,#3        /* r0 is 4byte aligned ? */
+       orrs    r3,r3,r1        /* r1 == 0 ? */
+       mov     r3,r0           /* p:r3 = b; */
+       bne     .memset_byte
+       add     r2,r0,r2        /* e:r2 = b + (len & -4); */
+       bic     r2,r2,#3
+.memset32_zero:
+       cmp     r3,r2           /* if (e > p) { */
+       bls     .memset_byte
+1:                             /*  do { */
+       str     r1,[r3],#4      /*   *(uint32_t *)p++ = c; */
+       cmp     r3,r2           /*  while (e < p); */
+       bhi     1b
+                               /* } */
+.memset_byte:
+       add     r2,r0,r2        /* e:r2 = b + len; */
+       cmp     r0,r2           /* if (e > p) return; */
+       movls   pc,lr
+1:                             /* do { */
+       strb    r1,[r3],#1      /*  *(uint8_t *)p++ = c; */
+       cmp     r3,r2           /* while (e < p); */
+       bhi     1b
+       mov     pc,lr           /* return; */
diff -r 4990bc397415 -r 25963a1da60c sys/arch/dreamcast/dev/microcode/aica_armcode.h
--- a/sys/arch/dreamcast/dev/microcode/aica_armcode.h   Thu Apr 20 13:47:02 2023 +0000
+++ b/sys/arch/dreamcast/dev/microcode/aica_armcode.h   Thu Apr 20 14:08:07 2023 +0000
@@ -1,1115 +1,1095 @@
-/* $NetBSD: aica_armcode.h,v 1.4 2019/05/06 17:12:50 ryo Exp $ */
+/* $NetBSD: aica_armcode.h,v 1.4.2.1 2023/04/20 14:08:07 martin Exp $ */
 static uint32_t aica_armcode[] = {
  /* 0000 */    0xea000006, 
- /* 0004 */    0xea000010, 
- /* 0008 */    0xea00000e, 
- /* 000c */    0xea00000c, 
- /* 0010 */    0xea00000a, 
- /* 0014 */    0xea000007, 
- /* 0018 */    0xea000007, 
+ /* 0004 */    0xea000014, 
+ /* 0008 */    0xea000012, 
+ /* 000c */    0xea000010, 
+ /* 0010 */    0xea00000e, 
+ /* 0014 */    0xea00000b, 
+ /* 0018 */    0xea00000b, 
  /* 001c */    0xe24ef004, 
  /* 0020 */    0xe3a0dcff, 
  /* 0024 */    0xe10f0000, 
  /* 0028 */    0xe3c00080, 
  /* 002c */    0xe3c00040, 
  /* 0030 */    0xe129f000, 
- /* 0034 */    0xeb0001b6, 
- /* 0038 */    0xeafffffe, 
- /* 003c */    0xe24ef004, 
- /* 0040 */    0xe24ef008, 
- /* 0044 */    0xe24ef004, 
- /* 0048 */    0xe1a0f00e, 
- /* 004c */    0xe1a0f00e, 
- /* 0050 */    0xe3a00502, 
- /* 0054 */    0xe3a02000, 
- /* 0058 */    0xe2803a02, 
- /* 005c */    0xe52d4004, 
- /* 0060 */    0xe5832800, 
- /* 0064 */    0xe1a01002, 
- /* 0068 */    0xe3a04902, 
- /* 006c */    0xe3a0001f, 
- /* 0070 */    0xe3a0c024, 
- /* 0074 */    0xe1a03381, 
- /* 0078 */    0xe2811001, 
- /* 007c */    0xe2833502, 
- /* 0080 */    0xe3510040, 
- /* 0084 */    0xe5834000, 
- /* 0088 */    0xe5832004, 
- /* 008c */    0xe5832008, 
- /* 0090 */    0xe583200c, 
- /* 0094 */    0xe5830010, 
- /* 0098 */    0xe5830014, 
- /* 009c */    0xe5832018, 
- /* 00a0 */    0xe583201c, 
- /* 00a4 */    0xe5832020, 
- /* 00a8 */    0xe5832024, 
- /* 00ac */    0xe583c028, 
- /* 00b0 */    0xe583202c, 
- /* 00b4 */    0xe5832030, 
- /* 00b8 */    0xe5832034, 
- /* 00bc */    0xe5832038, 
- /* 00c0 */    0xe583203c, 
- /* 00c4 */    0xe5832040, 
- /* 00c8 */    0xe5832044, 
- /* 00cc */    0xe5832048, 
- /* 00d0 */    0xe583204c, 
- /* 00d4 */    0xe5832050, 
- /* 00d8 */    0xe5832054, 
- /* 00dc */    0xe5832058, 
- /* 00e0 */    0xe583205c, 
- /* 00e4 */    0xe5832060, 
- /* 00e8 */    0xe5832064, 
- /* 00ec */    0xe5832068, 
- /* 00f0 */    0xe583206c, 
- /* 00f4 */    0xe5832070, 
- /* 00f8 */    0xe5832074, 
- /* 00fc */    0xe5832078, 
- /* 0100 */    0xe583207c, 
- /* 0104 */    0x1affffda, 
- /* 0108 */    0xe3a0c502, 
- /* 010c */    0xe28c1a02, 
- /* 0110 */    0xe3a0200f, 
- /* 0114 */    0xe5812800, 
- /* 0118 */    0xe8bd0010, 
- /* 011c */    0xe1a0f00e, 
- /* 0120 */    0xe3a0c502, 
- /* 0124 */    0xe28c2b0a, 
- /* 0128 */    0xe3a03000, 
- /* 012c */    0xe5c2300d, 
- /* 0130 */    0xe28c1a02, 
- /* 0134 */    0xe5913814, 
- /* 0138 */    0xe1530000, 
- /* 013c */    0x23a00000, 
- /* 0140 */    0x33a00001, 
- /* 0144 */    0xe1a0f00e, 
- /* 0148 */    0xe3a0c502, 
- /* 014c */    0xe28c2b0a, 



Home | Main Index | Thread Index | Old Index