[src/trunk]: src/sys/dev/tc In the Alpha tc_syncbus(), we need to issue a MB ...

[thorpej <thorpej%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/775594ccaee6
branches:  trunk
changeset: 368586:775594ccaee6
user:      thorpej <thorpej%NetBSD.org@localhost>
date:      Wed Jul 20 15:45:28 2022 +0000

description:
In the Alpha tc_syncbus(), we need to issue a MB because WMB does not
order reads with respect to writes.  Remove now-redundant tc_wmb()
calls before tc_syncbus().

NFC on MIPS other than removing a redundant wbflush() (tc_wmb() followed
by tc_syncbus()).

diffstat:

 sys/arch/alpha/include/tc_machdep.h |  7 ++++++-
 sys/dev/tc/pxg.c                    |  6 ++----
 sys/dev/tc/stic.c                   |  8 ++------
 3 files changed, 10 insertions(+), 11 deletions(-)

diffs (103 lines):

diff -r 20d448bd67e0 -r 775594ccaee6 sys/arch/alpha/include/tc_machdep.h
--- a/sys/arch/alpha/include/tc_machdep.h       Wed Jul 20 14:19:38 2022 +0000
+++ b/sys/arch/alpha/include/tc_machdep.h       Wed Jul 20 15:45:28 2022 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: tc_machdep.h,v 1.7 2017/06/22 16:46:52 flxd Exp $ */
+/* $NetBSD: tc_machdep.h,v 1.8 2022/07/20 15:45:28 thorpej Exp $ */
 
 /*
  * Copyright (c) 1994, 1995 Carnegie-Mellon University.
@@ -71,6 +71,11 @@
 #define        tc_syncbus()                                                    \
     do {                                                               \
        volatile uint32_t no_optimize;                                  \
+       /*                                                              \
+        * WMB does not order reads with respect to writes, so a        \
+        * MB is required here.                                         \
+        */                                                             \
+       alpha_mb();                                                     \
        no_optimize =                                                   \
            *(volatile uint32_t *)ALPHA_PHYS_TO_K0SEG(0x00000001f0080220); \
        __USE(no_optimize);                                             \
diff -r 20d448bd67e0 -r 775594ccaee6 sys/dev/tc/pxg.c
--- a/sys/dev/tc/pxg.c  Wed Jul 20 14:19:38 2022 +0000
+++ b/sys/dev/tc/pxg.c  Wed Jul 20 15:45:28 2022 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: pxg.c,v 1.36 2019/11/10 21:16:37 chs Exp $     */
+/*     $NetBSD: pxg.c,v 1.37 2022/07/20 15:45:28 thorpej Exp $ */
 
 /*-
  * Copyright (c) 1999, 2000, 2001 The NetBSD Foundation, Inc.
@@ -35,7 +35,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: pxg.c,v 1.36 2019/11/10 21:16:37 chs Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pxg.c,v 1.37 2022/07/20 15:45:28 thorpej Exp $");
 
 #include <sys/param.h>
 #include <sys/systm.h>
@@ -164,7 +164,6 @@
 
        /* Start the i860. */
        si->si_slotbase[PXG_I860_START_OFFSET >> 2] = 1;
-       tc_wmb();
        tc_syncbus();
        DELAY(40000);
 #endif
@@ -208,7 +207,6 @@
        slot[PXG_I860_RESET_OFFSET >> 2] = 0;
        tc_wmb();
        slot[PXG_HOST_INTR_OFFSET >> 2] = 0;
-       tc_wmb();
        tc_syncbus();
        DELAY(40000);
 
diff -r 20d448bd67e0 -r 775594ccaee6 sys/dev/tc/stic.c
--- a/sys/dev/tc/stic.c Wed Jul 20 14:19:38 2022 +0000
+++ b/sys/dev/tc/stic.c Wed Jul 20 15:45:28 2022 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: stic.c,v 1.58 2022/05/18 13:56:32 andvar Exp $ */
+/*     $NetBSD: stic.c,v 1.59 2022/07/20 15:45:28 thorpej Exp $        */
 
 /*-
  * Copyright (c) 1999, 2000, 2001 The NetBSD Foundation, Inc.
@@ -36,7 +36,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: stic.c,v 1.58 2022/05/18 13:56:32 andvar Exp $");
+__KERNEL_RCSID(0, "$NetBSD: stic.c,v 1.59 2022/07/20 15:45:28 thorpej Exp $");
 
 #include <sys/param.h>
 #include <sys/systm.h>
@@ -288,7 +288,6 @@
 
        /* Now reset the VDAC. */
        *si->si_vdac_reset = 0;
-       tc_wmb();
        tc_syncbus();
        DELAY(1000);
 
@@ -358,13 +357,11 @@
         * Initialize the interface chip registers.
         */
        sr->sr_sticsr = 0x00000030;     /* Get the STIC's attention. */
-       tc_wmb();
        tc_syncbus();
        DELAY(2000);                    /* wait 2ms for STIC to respond. */
        sr->sr_sticsr = 0x00000000;     /* Hit the STIC's csr again... */
        tc_wmb();
        sr->sr_buscsr = 0xffffffff;     /* and bash its bus-access csr. */
-       tc_wmb();
        tc_syncbus();                   /* Blam! */
        DELAY(20000);                   /* wait until the stic recovers... */
 
@@ -402,7 +399,6 @@
        sr->sr_ipdvint =
            STIC_INT_WE | STIC_INT_P | STIC_INT_E_EN | STIC_INT_V_EN;
        sr->sr_sticsr = 8;
-       tc_wmb();
        tc_syncbus();
 }