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[src/trunk]: src/sys/arch/arm/include Move arm_cache_info from cpufunc.h to c...



details:   https://anonhg.NetBSD.org/src/rev/ceb73494b8bb
branches:  trunk
changeset: 1024736:ceb73494b8bb
user:      skrll <skrll%NetBSD.org@localhost>
date:      Mon Nov 01 14:45:24 2021 +0000

description:
Move arm_cache_info from cpufunc.h to cpu.h

diffstat:

 sys/arch/arm/include/cpu.h     |  32 ++++++++++++++++++++++++++++++--
 sys/arch/arm/include/cpufunc.h |  29 -----------------------------
 2 files changed, 30 insertions(+), 31 deletions(-)

diffs (87 lines):

diff -r 2d7fd8b26a46 -r ceb73494b8bb sys/arch/arm/include/cpu.h
--- a/sys/arch/arm/include/cpu.h        Mon Nov 01 14:33:41 2021 +0000
+++ b/sys/arch/arm/include/cpu.h        Mon Nov 01 14:45:24 2021 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: cpu.h,v 1.120 2021/10/31 16:23:47 skrll Exp $  */
+/*     $NetBSD: cpu.h,v 1.121 2021/11/01 14:45:24 skrll Exp $  */
 
 /*
  * Copyright (c) 1994-1996 Mark Brinicombe.
@@ -156,9 +156,37 @@
 #include <sys/device_if.h>
 #include <sys/evcnt.h>
 
-#include <arm/cpufunc.h>
 #include <machine/param.h>
 
+/*
+ * Cache info variables.
+ */
+#define        CACHE_TYPE_VIVT         0
+#define        CACHE_TYPE_xxPT         1
+#define        CACHE_TYPE_VIPT         1
+#define        CACHE_TYPE_PIxx         2
+#define        CACHE_TYPE_PIPT         3
+
+/* PRIMARY CACHE VARIABLES */
+struct arm_cache_info {
+       u_int icache_size;
+       u_int icache_line_size;
+       u_int icache_ways;
+       u_int icache_way_size;
+       u_int icache_sets;
+
+       u_int dcache_size;
+       u_int dcache_line_size;
+       u_int dcache_ways;
+       u_int dcache_way_size;
+       u_int dcache_sets;
+
+       uint8_t cache_type;
+       bool cache_unified;
+       uint8_t icache_type;
+       uint8_t dcache_type;
+};
+
 struct cpu_info {
        struct cpu_data ci_data;        /* MI per-cpu data */
        device_t        ci_dev;         /* Device corresponding to this CPU */
diff -r 2d7fd8b26a46 -r ceb73494b8bb sys/arch/arm/include/cpufunc.h
--- a/sys/arch/arm/include/cpufunc.h    Mon Nov 01 14:33:41 2021 +0000
+++ b/sys/arch/arm/include/cpufunc.h    Mon Nov 01 14:45:24 2021 +0000
@@ -410,35 +410,6 @@
 
 void cpu_reset         (void) __dead;
 
-/*
- * Cache info variables.
- */
-#define        CACHE_TYPE_VIVT         0
-#define        CACHE_TYPE_xxPT         1
-#define        CACHE_TYPE_VIPT         1
-#define        CACHE_TYPE_PIxx         2
-#define        CACHE_TYPE_PIPT         3
-
-/* PRIMARY CACHE VARIABLES */
-struct arm_cache_info {
-       u_int icache_size;
-       u_int icache_line_size;
-       u_int icache_ways;
-       u_int icache_way_size;
-       u_int icache_sets;
-
-       u_int dcache_size;
-       u_int dcache_line_size;
-       u_int dcache_ways;
-       u_int dcache_way_size;
-       u_int dcache_sets;
-
-       uint8_t cache_type;
-       bool cache_unified;
-       uint8_t icache_type;
-       uint8_t dcache_type;
-};
-
 #if (ARM_MMU_V6 + ARM_MMU_V7) != 0
 extern u_int arm_cache_prefer_mask;
 #endif



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