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[src/trunk]: src/usr.sbin/cpuctl/arch Move some common functions into x86/ide...



details:   https://anonhg.NetBSD.org/src/rev/f0b998a02338
branches:  trunk
changeset: 1024006:f0b998a02338
user:      msaitoh <msaitoh%NetBSD.org@localhost>
date:      Thu Oct 07 13:04:18 2021 +0000

description:
Move some common functions into x86/identcpu_subr.c. No functional change.

diffstat:

 sys/arch/x86/include/cacheinfo.h   |    5 +-
 sys/arch/x86/include/cpu.h         |    3 +-
 sys/arch/x86/x86/identcpu.c        |   83 +--------------------------
 sys/arch/x86/x86/identcpu_subr.c   |   79 ++++++++++++++++++++++++++-
 usr.sbin/cpuctl/arch/cpuctl_i386.h |    3 +-
 usr.sbin/cpuctl/arch/i386.c        |  107 ++++--------------------------------
 6 files changed, 104 insertions(+), 176 deletions(-)

diffs (truncated from 513 to 300 lines):

diff -r b03ad4573188 -r f0b998a02338 sys/arch/x86/include/cacheinfo.h
--- a/sys/arch/x86/include/cacheinfo.h  Thu Oct 07 12:52:27 2021 +0000
+++ b/sys/arch/x86/include/cacheinfo.h  Thu Oct 07 13:04:18 2021 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: cacheinfo.h,v 1.29 2021/09/27 16:52:15 msaitoh Exp $   */
+/*     $NetBSD: cacheinfo.h,v 1.30 2021/10/07 13:04:18 msaitoh Exp $   */
 
 #ifndef _X86_CACHEINFO_H_
 #define _X86_CACHEINFO_H_
@@ -359,4 +359,7 @@
 __CI_TBL(0, 0x00,    0, 0, 0, NULL)  \
 }
 
+const struct x86_cache_info *cpu_cacheinfo_lookup(
+       const struct x86_cache_info *, uint8_t);
+
 #endif /* _X86_CACHEINFO_H_ */
diff -r b03ad4573188 -r f0b998a02338 sys/arch/x86/include/cpu.h
--- a/sys/arch/x86/include/cpu.h        Thu Oct 07 12:52:27 2021 +0000
+++ b/sys/arch/x86/include/cpu.h        Thu Oct 07 13:04:18 2021 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: cpu.h,v 1.131 2021/08/14 17:51:20 ryo Exp $    */
+/*     $NetBSD: cpu.h,v 1.132 2021/10/07 13:04:18 msaitoh Exp $        */
 
 /*
  * Copyright (c) 1990 The Regents of the University of California.
@@ -496,6 +496,7 @@
 
 /* identcpu_subr.c */
 uint64_t cpu_tsc_freq_cpuid(struct cpu_info *);
+void   cpu_dcp_cacheinfo(struct cpu_info *, uint32_t);
 
 typedef enum vm_guest {
        VM_GUEST_NO = 0,
diff -r b03ad4573188 -r f0b998a02338 sys/arch/x86/x86/identcpu.c
--- a/sys/arch/x86/x86/identcpu.c       Thu Oct 07 12:52:27 2021 +0000
+++ b/sys/arch/x86/x86/identcpu.c       Thu Oct 07 13:04:18 2021 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: identcpu.c,v 1.122 2021/10/07 12:52:27 msaitoh Exp $   */
+/*     $NetBSD: identcpu.c,v 1.123 2021/10/07 13:04:18 msaitoh Exp $   */
 
 /*-
  * Copyright (c) 1999, 2000, 2001, 2006, 2007, 2008 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: identcpu.c,v 1.122 2021/10/07 12:52:27 msaitoh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: identcpu.c,v 1.123 2021/10/07 13:04:18 msaitoh Exp $");
 
 #include "opt_xen.h"
 
@@ -101,79 +101,6 @@
        "Vortex86"
 };
 
-static const struct x86_cache_info *
-cache_info_lookup(const struct x86_cache_info *cai, uint8_t desc)
-{
-       int i;
-
-       for (i = 0; cai[i].cai_desc != 0; i++) {
-               if (cai[i].cai_desc == desc)
-                       return (&cai[i]);
-       }
-
-       return (NULL);
-}
-
-/*
- * Get cache info from one of the following:
- *     Intel Deterministic Cache Parameter Leaf (0x04)
- *     AMD Cache Topology Information Leaf (0x8000001d)
- */
-static void
-cpu_dcp_cacheinfo(struct cpu_info *ci, uint32_t leaf)
-{
-       u_int descs[4];
-       int type, level, ways, partitions, linesize, sets, totalsize;
-       int caitype = -1;
-       int i;
-
-       for (i = 0; ; i++) {
-               x86_cpuid2(leaf, i, descs);
-               type = __SHIFTOUT(descs[0], CPUID_DCP_CACHETYPE);
-               if (type == CPUID_DCP_CACHETYPE_N)
-                       break;
-               level = __SHIFTOUT(descs[0], CPUID_DCP_CACHELEVEL);
-               switch (level) {
-               case 1:
-                       if (type == CPUID_DCP_CACHETYPE_I)
-                               caitype = CAI_ICACHE;
-                       else if (type == CPUID_DCP_CACHETYPE_D)
-                               caitype = CAI_DCACHE;
-                       else
-                               caitype = -1;
-                       break;
-               case 2:
-                       if (type == CPUID_DCP_CACHETYPE_U)
-                               caitype = CAI_L2CACHE;
-                       else
-                               caitype = -1;
-                       break;
-               case 3:
-                       if (type == CPUID_DCP_CACHETYPE_U)
-                               caitype = CAI_L3CACHE;
-                       else
-                               caitype = -1;
-                       break;
-               default:
-                       caitype = -1;
-                       break;
-               }
-               if (caitype == -1)
-                       continue;
-
-               ways = __SHIFTOUT(descs[1], CPUID_DCP_WAYS) + 1;
-               partitions =__SHIFTOUT(descs[1], CPUID_DCP_PARTITIONS)
-                   + 1;
-               linesize = __SHIFTOUT(descs[1], CPUID_DCP_LINESIZE)
-                   + 1;
-               sets = descs[2] + 1;
-               totalsize = ways * partitions * linesize * sets;
-               ci->ci_cinfo[caitype].cai_totalsize = totalsize;
-               ci->ci_cinfo[caitype].cai_associativity = ways;
-               ci->ci_cinfo[caitype].cai_linesize = linesize;
-       }
-}
-
 static void
 cpu_probe_intel_cache(struct cpu_info *ci)
 {
@@ -196,7 +123,7 @@
                                        desc = (descs[i] >> (j * 8)) & 0xff;
                                        if (desc == 0)
                                                continue;
-                                       cai = cache_info_lookup(
+                                       cai = cpu_cacheinfo_lookup(
                                            intel_cpuid_cache_info, desc);
                                        if (cai != NULL) {
                                                ci->ci_cinfo[cai->cai_index] =
@@ -313,7 +240,7 @@
        cai->cai_associativity = AMD_L2_ECX_C_ASSOC(descs[2]);
        cai->cai_linesize = AMD_L2_ECX_C_LS(descs[2]);
 
-       cp = cache_info_lookup(amd_cpuid_l2l3cache_assoc_info,
+       cp = cpu_cacheinfo_lookup(amd_cpuid_l2l3cache_assoc_info,
            cai->cai_associativity);
        if (cp != NULL)
                cai->cai_associativity = cp->cai_associativity;
@@ -329,7 +256,7 @@
        cai->cai_associativity = AMD_L3_EDX_C_ASSOC(descs[3]);
        cai->cai_linesize = AMD_L3_EDX_C_LS(descs[3]);
 
-       cp = cache_info_lookup(amd_cpuid_l2l3cache_assoc_info,
+       cp = cpu_cacheinfo_lookup(amd_cpuid_l2l3cache_assoc_info,
            cai->cai_associativity);
        if (cp != NULL)
                cai->cai_associativity = cp->cai_associativity;
diff -r b03ad4573188 -r f0b998a02338 sys/arch/x86/x86/identcpu_subr.c
--- a/sys/arch/x86/x86/identcpu_subr.c  Thu Oct 07 12:52:27 2021 +0000
+++ b/sys/arch/x86/x86/identcpu_subr.c  Thu Oct 07 13:04:18 2021 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: identcpu_subr.c,v 1.8 2021/01/16 15:26:23 jmcneill Exp $ */
+/* $NetBSD: identcpu_subr.c,v 1.9 2021/10/07 13:04:18 msaitoh Exp $ */
 
 /*-
  * Copyright (c) 2020 The NetBSD Foundation, Inc.
@@ -35,7 +35,7 @@
  * See src/usr.sbin/cpuctl/{Makefile, arch/i386.c}).
  */
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: identcpu_subr.c,v 1.8 2021/01/16 15:26:23 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: identcpu_subr.c,v 1.9 2021/10/07 13:04:18 msaitoh Exp $");
 
 #ifdef _KERNEL_OPT
 #include "lapic.h"
@@ -47,6 +47,7 @@
 #include <sys/systm.h>
 #include <x86/cpuvar.h>
 #include <x86/apicvar.h>
+#include <x86/cacheinfo.h>
 #include <machine/cpufunc.h>
 #include <machine/cputypes.h>
 #include <machine/specialreg.h>
@@ -56,6 +57,7 @@
 #include <stdio.h>
 #include <stdlib.h>
 #include <string.h>
+#include <x86/cacheinfo.h>
 #include "cpuctl.h"
 #include "cpuctl_i386.h"
 #endif
@@ -143,3 +145,76 @@
 
        return freq;
 }
+
+const struct x86_cache_info *
+cpu_cacheinfo_lookup(const struct x86_cache_info *cai, uint8_t desc)
+{
+       int i;
+
+       for (i = 0; cai[i].cai_desc != 0; i++) {
+               if (cai[i].cai_desc == desc)
+                       return &cai[i];
+       }
+
+       return NULL;
+}
+
+/*
+ * Get cache info from one of the following:
+ *     Intel Deterministic Cache Parameter Leaf (0x04)
+ *     AMD Cache Topology Information Leaf (0x8000001d)
+ */
+void
+cpu_dcp_cacheinfo(struct cpu_info *ci, uint32_t leaf)
+{
+       u_int descs[4];
+       int type, level, ways, partitions, linesize, sets, totalsize;
+       int caitype = -1;
+       int i;
+
+       for (i = 0; ; i++) {
+               x86_cpuid2(leaf, i, descs);
+               type = __SHIFTOUT(descs[0], CPUID_DCP_CACHETYPE);
+               if (type == CPUID_DCP_CACHETYPE_N)
+                       break;
+               level = __SHIFTOUT(descs[0], CPUID_DCP_CACHELEVEL);
+               switch (level) {
+               case 1:
+                       if (type == CPUID_DCP_CACHETYPE_I)
+                               caitype = CAI_ICACHE;
+                       else if (type == CPUID_DCP_CACHETYPE_D)
+                               caitype = CAI_DCACHE;
+                       else
+                               caitype = -1;
+                       break;
+               case 2:
+                       if (type == CPUID_DCP_CACHETYPE_U)
+                               caitype = CAI_L2CACHE;
+                       else
+                               caitype = -1;
+                       break;
+               case 3:
+                       if (type == CPUID_DCP_CACHETYPE_U)
+                               caitype = CAI_L3CACHE;
+                       else
+                               caitype = -1;
+                       break;
+               default:
+                       caitype = -1;
+                       break;
+               }
+               if (caitype == -1)
+                       continue;
+
+               ways = __SHIFTOUT(descs[1], CPUID_DCP_WAYS) + 1;
+               partitions =__SHIFTOUT(descs[1], CPUID_DCP_PARTITIONS)
+                   + 1;
+               linesize = __SHIFTOUT(descs[1], CPUID_DCP_LINESIZE)
+                   + 1;
+               sets = descs[2] + 1;
+               totalsize = ways * partitions * linesize * sets;
+               ci->ci_cinfo[caitype].cai_totalsize = totalsize;
+               ci->ci_cinfo[caitype].cai_associativity = ways;
+               ci->ci_cinfo[caitype].cai_linesize = linesize;
+       }
+}
diff -r b03ad4573188 -r f0b998a02338 usr.sbin/cpuctl/arch/cpuctl_i386.h
--- a/usr.sbin/cpuctl/arch/cpuctl_i386.h        Thu Oct 07 12:52:27 2021 +0000
+++ b/usr.sbin/cpuctl/arch/cpuctl_i386.h        Thu Oct 07 13:04:18 2021 +0000
@@ -1,4 +1,4 @@
-/*      $NetBSD: cpuctl_i386.h,v 1.5 2020/04/21 02:56:37 msaitoh Exp $      */
+/*      $NetBSD: cpuctl_i386.h,v 1.6 2021/10/07 13:04:18 msaitoh Exp $      */
 
 #include <machine/specialreg.h>
 #include <x86/cputypes.h>
@@ -45,6 +45,7 @@
 
 /* For x86/x86/identcpu_subr.c */
 uint64_t cpu_tsc_freq_cpuid(struct cpu_info *);
+void   cpu_dcp_cacheinfo(struct cpu_info *, uint32_t);
 
 /* Interfaces to code in i386-asm.S */
 
diff -r b03ad4573188 -r f0b998a02338 usr.sbin/cpuctl/arch/i386.c
--- a/usr.sbin/cpuctl/arch/i386.c       Thu Oct 07 12:52:27 2021 +0000
+++ b/usr.sbin/cpuctl/arch/i386.c       Thu Oct 07 13:04:18 2021 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: i386.c,v 1.121 2021/09/27 17:05:58 msaitoh Exp $       */
+/*     $NetBSD: i386.c,v 1.122 2021/10/07 13:04:18 msaitoh Exp $       */
 
 /*-
  * Copyright (c) 1999, 2000, 2001, 2006, 2007, 2008 The NetBSD Foundation, Inc.
@@ -57,7 +57,7 @@
 
 #include <sys/cdefs.h>
 #ifndef lint



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