[src/trunk]: src/sys/arch/aarch64/aarch64 Ensure that all memory accesses pri...

[jmcneill <jmcneill%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/358a325c5515
branches:  trunk
changeset: 1023256:358a325c5515
user:      jmcneill <jmcneill%NetBSD.org@localhost>
date:      Mon Aug 30 22:28:50 2021 +0000

description:
Ensure that all memory accesses prior to executing WFI have been completed
by adding a DSB SY before stopping execution and entering a low power
state. From the ARM Cortex-A Series Programmer's Guide for ARMv8-A:

"ARM recommends the use of a Data Synchronization Barrier (DSB) instruction
before WFI or WFE, to ensure that pending memory transactions complete before
changing state."

diffstat:

 sys/arch/aarch64/aarch64/idle_machdep.S |  6 ++++--
 1 files changed, 4 insertions(+), 2 deletions(-)

diffs (34 lines):

diff -r be593642026e -r 358a325c5515 sys/arch/aarch64/aarch64/idle_machdep.S
--- a/sys/arch/aarch64/aarch64/idle_machdep.S   Mon Aug 30 22:24:39 2021 +0000
+++ b/sys/arch/aarch64/aarch64/idle_machdep.S   Mon Aug 30 22:28:50 2021 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: idle_machdep.S,v 1.9 2021/02/23 14:50:33 ryo Exp $ */
+/* $NetBSD: idle_machdep.S,v 1.10 2021/08/30 22:28:50 jmcneill Exp $ */
 
 /*-
  * Copyright (c) 2014 The NetBSD Foundation, Inc.
@@ -36,7 +36,7 @@
 #include <aarch64/locore.h>
 #include "assym.h"
 
-RCSID("$NetBSD: idle_machdep.S,v 1.9 2021/02/23 14:50:33 ryo Exp $");
+RCSID("$NetBSD: idle_machdep.S,v 1.10 2021/08/30 22:28:50 jmcneill Exp $");
 
 #ifdef ARM_INTR_IMPL
 #include ARM_INTR_IMPL
@@ -55,6 +55,7 @@
        /*
         * hardware interrupt -> trap handler -> interrupt handler
         */
+       dsb sy
        wfi
 
 #else /* LAZY_CPUIDLE */
@@ -93,6 +94,7 @@
         */
        str     w2, [x28, #CI_INTR_DEPTH]       /* ci->ci_intr_depth = 1 */
 
+       dsb sy
        wfi
        bl      ARM_IRQ_HANDLER                 /* irqhandler(trapframe) */
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