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[src/trunk]: src/sys/dev/pci/ixgbe Added BUS_DMA_COHERENT flag to bus_dmamem_...



details:   https://anonhg.NetBSD.org/src/rev/3ab0609df837
branches:  trunk
changeset: 1021252:3ab0609df837
user:      ryo <ryo%NetBSD.org@localhost>
date:      Thu May 20 01:02:42 2021 +0000

description:
Added BUS_DMA_COHERENT flag to bus_dmamem_map() to improve stability on aarch64.

In ixgbe, TX/RX descriptor rings are configured in 16-byte units.
If BUS_DMA_COHERENT is not specified, cpu cache (writeback/invalidate)
operations by bus_dmamap_sync() in aarch64 (arm/arm32/bus_dma.c) are done per
cache line size (usually 64 bytes). As a result, adjacent descriptors conflict
with the DMA operation, resulting in unstable operation.

To avoid this, descriptors area should be mapped as non-cache with BUS_DMA_COHERENT.


thanks to msaitoh@ for his help in debugging.

diffstat:

 sys/dev/pci/ixgbe/ix_txrx.c |  6 +++---
 1 files changed, 3 insertions(+), 3 deletions(-)

diffs (27 lines):

diff -r 79f80ca877b2 -r 3ab0609df837 sys/dev/pci/ixgbe/ix_txrx.c
--- a/sys/dev/pci/ixgbe/ix_txrx.c       Wed May 19 22:45:49 2021 +0000
+++ b/sys/dev/pci/ixgbe/ix_txrx.c       Thu May 20 01:02:42 2021 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: ix_txrx.c,v 1.75 2021/05/18 05:29:15 msaitoh Exp $ */
+/* $NetBSD: ix_txrx.c,v 1.76 2021/05/20 01:02:42 ryo Exp $ */
 
 /******************************************************************************
 
@@ -64,7 +64,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: ix_txrx.c,v 1.75 2021/05/18 05:29:15 msaitoh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: ix_txrx.c,v 1.76 2021/05/20 01:02:42 ryo Exp $");
 
 #include "opt_inet.h"
 #include "opt_inet6.h"
@@ -2208,7 +2208,7 @@
        }
 
        r = bus_dmamem_map(dma->dma_tag->dt_dmat, &dma->dma_seg, rsegs,
-           size, &dma->dma_vaddr, BUS_DMA_NOWAIT);
+           size, &dma->dma_vaddr, BUS_DMA_NOWAIT | BUS_DMA_COHERENT);
        if (r != 0) {
                aprint_error_dev(dev, "%s: bus_dmamem_map failed; error %d\n",
                    __func__, r);



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