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[src/trunk]: src/sys/arch/riscv Misc changes in RISC-V.



details:   https://anonhg.NetBSD.org/src/rev/f4814347a716
branches:  trunk
changeset: 999700:f4814347a716
user:      maxv <maxv%NetBSD.org@localhost>
date:      Sun Jun 16 07:42:52 2019 +0000

description:
Misc changes in RISC-V.

diffstat:

 sys/arch/riscv/conf/Makefile.riscv  |    6 +-
 sys/arch/riscv/conf/files.riscv     |    3 +-
 sys/arch/riscv/conf/kern.ldscript   |  137 ++++++++++++----------------
 sys/arch/riscv/include/pmap.h       |   28 +++--
 sys/arch/riscv/include/pte.h        |  170 +++++++++++++++--------------------
 sys/arch/riscv/include/sysreg.h     |   41 ++++----
 sys/arch/riscv/riscv/db_machdep.c   |    4 +-
 sys/arch/riscv/riscv/genassym.cf    |   14 +-
 sys/arch/riscv/riscv/locore.S       |   14 +-
 sys/arch/riscv/riscv/pmap_machdep.c |   56 ++++-------
 sys/arch/riscv/riscv/trap.c         |    8 +-
 11 files changed, 218 insertions(+), 263 deletions(-)

diffs (truncated from 836 to 300 lines):

diff -r eb3873ad51c2 -r f4814347a716 sys/arch/riscv/conf/Makefile.riscv
--- a/sys/arch/riscv/conf/Makefile.riscv        Sat Jun 15 15:22:56 2019 +0000
+++ b/sys/arch/riscv/conf/Makefile.riscv        Sun Jun 16 07:42:52 2019 +0000
@@ -1,4 +1,4 @@
-#      $NetBSD: Makefile.riscv,v 1.4 2019/06/01 12:42:27 maxv Exp $
+#      $NetBSD: Makefile.riscv,v 1.5 2019/06/16 07:42:52 maxv Exp $
 
 # Makefile for NetBSD
 #
@@ -69,8 +69,8 @@
 ## (5) link settings
 ##
 .if ${MACHINE_ARCH} == "riscv64" && ${LP64:Uyes} == "yes"
-TEXTADDR?=              0xFFFFFFC000000000
-.else   
+TEXTADDR?=             0xFFFFFFC000000000
+.else
 TEXTADDR?=             0xC0001000
 .endif
 KERNLDSCRIPT?=         ${RISCV}/conf/kern.ldscript
diff -r eb3873ad51c2 -r f4814347a716 sys/arch/riscv/conf/files.riscv
--- a/sys/arch/riscv/conf/files.riscv   Sat Jun 15 15:22:56 2019 +0000
+++ b/sys/arch/riscv/conf/files.riscv   Sun Jun 16 07:42:52 2019 +0000
@@ -1,4 +1,4 @@
-#      $NetBSD: files.riscv,v 1.2 2019/06/01 12:42:27 maxv Exp $
+#      $NetBSD: files.riscv,v 1.3 2019/06/16 07:42:52 maxv Exp $
 #
 
 maxpartitions  16
@@ -41,7 +41,6 @@
 file   kern/subr_disk_mbr.c                    disk
 
 file   uvm/pmap/pmap.c
-file   uvm/pmap/pmap_pvt.c
 file   uvm/pmap/pmap_segtab.c
 file   uvm/pmap/pmap_tlb.c
 
diff -r eb3873ad51c2 -r f4814347a716 sys/arch/riscv/conf/kern.ldscript
--- a/sys/arch/riscv/conf/kern.ldscript Sat Jun 15 15:22:56 2019 +0000
+++ b/sys/arch/riscv/conf/kern.ldscript Sun Jun 16 07:42:52 2019 +0000
@@ -1,82 +1,63 @@
-/* Script for -n: mix text and data on same page */
-OUTPUT_FORMAT("elf64-littleriscv")
 OUTPUT_ARCH(riscv)
-ENTRY(_start)
+ENTRY(start)
+
+__PAGE_SIZE = 0x1000 ;
+__LARGE_PAGE_SIZE = 0x200000 ;
+
 SECTIONS
 {
-  /* Read-only sections, merged into text segment: */
-  PROVIDE (__executable_start = SEGMENT_START("text-segment", 0xffffffff80000000)); . = SEGMENT_START("text-segment", 0xffffffff80000000) + SIZEOF_HEADERS;
-  .text           :
-  {
-    _ftext = . ;
-    *(.text)
-    *(.text.unlikely .text.*_unlikely)
-    *(.text.exit .text.exit.*)
-    *(.text.startup .text.startup.*)
-    *(.text.hot .text.hot.*)
-    *(.stub .text.* .gnu.linkonce.t.*)
-  }
-  PROVIDE (__etext = .);
-  PROVIDE (_etext = .);
-  PROVIDE (etext = .);
-  .rodata         : { *(.rodata .rodata.* .gnu.linkonce.r.*) }
-  .rodata1        : { *(.rodata1) }
-  .sdata2         :
-  {
-    *(.sdata2 .sdata2.* .gnu.linkonce.s2.*)
-  }
-  .sbss2          : { *(.sbss2 .sbss2.* .gnu.linkonce.sb2.*) }
-  .eh_frame_hdr : { *(.eh_frame_hdr) }
-  .eh_frame       : ONLY_IF_RO { KEEP (*(.eh_frame)) }
-  /* These sections are generated by the Sun/Oracle C++ compiler.  */
-  .exception_ranges   : ONLY_IF_RO { *(.exception_ranges
-  .exception_ranges*) }
-  /* Adjust the address for the data segment.  We want to adjust up to
-     the same address within the page on the next page up.  */
-  . = ALIGN (CONSTANT (MAXPAGESIZE)) - ((CONSTANT (MAXPAGESIZE) - .) & (CONSTANT (MAXPAGESIZE) - 1)); . = DATA_SEGMENT_ALIGN (CONSTANT (MAXPAGESIZE), CONSTANT (COMMONPAGESIZE));
-  /* Exception handling  */
-  .eh_frame       : ONLY_IF_RW { KEEP (*(.eh_frame)) }
-  .exception_ranges   : ONLY_IF_RW { *(.exception_ranges .exception_ranges*) }
-  . = DATA_SEGMENT_RELRO_END (0, .);
-  .data           :
-  {
-    _fdata = . ;
-    *(.data .data.* .gnu.linkonce.d.*)
-    SORT(CONSTRUCTORS)
-  }
-  .data1          : { *(.data1) }
-  /* We want the small data sections together, so single-instruction offsets
-     can access them all, and initialized data all before uninitialized, so
-     we can shorten the on-disk segment size.  */
-  .sdata          :
-  {
-    /*_gp = . + 0x800;*/
-    *(.srodata.cst16) *(.srodata.cst8) *(.srodata.cst4) *(.srodata.cst2) *(.srodata*)
-    *(.sdata .sdata.* .gnu.linkonce.s.*)
-  }
-  _edata = .; PROVIDE (edata = .);
-  . = .;
-  __bss_start = .;
-  _fbss = .;
-  .sbss           :
-  {
-    *(.dynsbss)
-    *(.sbss .sbss.* .gnu.linkonce.sb.*)
-    *(.scommon)
-  }
-  .bss            :
-  {
-    *(.dynbss)
-    *(.bss .bss.* .gnu.linkonce.b.*)
-    *(COMMON)
-    /* Align here to ensure that the .bss section occupies space up to
-       _end.  Align after .bss to ensure correct alignment even if the
-       .bss section disappears because there are no input sections.
-       FIXME: Why do we need it? When there is no .bss section, we don't
-       pad the .data section.  */
-    . = ALIGN(. != 0 ? 64 / 8 : 1);
-  }
-  . = ALIGN(64 / 8);
-  _end = .; PROVIDE (end = .);
-  . = DATA_SEGMENT_END (.);
+       .text : AT (ADDR(.text) & 0x0fffffff)
+       {
+               *(.text)
+               *(.text.*)
+               *(.stub)
+       }
+       _etext = . ;
+       PROVIDE (etext = .);
+
+       . = ALIGN(__LARGE_PAGE_SIZE);
+
+       __rodata_start = . ;
+       .rodata :
+       {
+               *(.rodata)
+               *(.rodata.*)
+               *(.srodata)
+               *(.srodata.*)
+       }
+
+       . = ALIGN(__LARGE_PAGE_SIZE);
+
+       __data_start = . ;
+       .data :
+       {
+               *(.data)
+               *(.sdata)
+               *(.sdata.*)
+       }
+       _edata = . ;
+       PROVIDE (edata = .) ;
+
+       __bss_start = .;
+       .bss :
+       {
+               *(.bss)
+               *(.bss.*)
+               *(.sbss)
+               *(.sbss.*)
+               *(COMMON)
+               . = ALIGN(__LARGE_PAGE_SIZE);
+       }
+
+       . = ALIGN(__PAGE_SIZE);
+
+       /* End of the kernel image */
+       __kernel_end = . ;
+
+       _end = . ;
+       PROVIDE (end = .) ;
+       .note.netbsd.ident :
+       {
+               KEEP(*(.note.netbsd.ident));
+       }
 }
diff -r eb3873ad51c2 -r f4814347a716 sys/arch/riscv/include/pmap.h
--- a/sys/arch/riscv/include/pmap.h     Sat Jun 15 15:22:56 2019 +0000
+++ b/sys/arch/riscv/include/pmap.h     Sun Jun 16 07:42:52 2019 +0000
@@ -1,11 +1,11 @@
-/* $NetBSD: pmap.h,v 1.2 2019/06/01 12:42:28 maxv Exp $ */
+/* $NetBSD: pmap.h,v 1.3 2019/06/16 07:42:52 maxv Exp $ */
 
-/*-
- * Copyright (c) 2014 The NetBSD Foundation, Inc.
+/*
+ * Copyright (c) 2014, 2019 The NetBSD Foundation, Inc.
  * All rights reserved.
  *
  * This code is derived from software contributed to The NetBSD Foundation
- * by Matt Thomas of 3am Software Foundry.
+ * by Matt Thomas (of 3am Software Foundry) and Maxime Villard.
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
@@ -47,17 +47,19 @@
 
 #include <riscv/pte.h>
 
-#define        PMAP_SEGTABSIZE         NPTEPG
+#define        PMAP_SEGTABSIZE NPTEPG
 
-#define NBSEG          (NBPG*NPTEPG)
+#define NBSEG          (PAGE_SIZE * NPTEPG)
+
 #ifdef _LP64
-#define NBXSEG         (NBSEG*NSEGPG)
+#define NBXSEG         (NBSEG * NSEGPG)
 #define XSEGSHIFT      (SEGSHIFT + PGSHIFT - 3)
-#define XSEGOFSET      (PTE_PPN1|SEGOFSET)
+#define XSEGOFSET      (PTE_PPN1 | SEGOFSET)
 #define SEGSHIFT       (PGSHIFT + PGSHIFT - 3)
 #else
 #define SEGSHIFT       (PGSHIFT + PGSHIFT - 2)
 #endif
+
 #define SEGOFSET       (PTE_PPN0|PAGE_MASK)
 
 #define KERNEL_PID     0
@@ -92,9 +94,7 @@
        __asm __volatile("fence\trw,rw; fence.i");
 }
 
-
 #include <uvm/pmap/tlb.h>
-
 #include <uvm/pmap/pmap_tlb.h>
 
 #define PMAP_GROWKERNEL
@@ -124,6 +124,11 @@
 void   pmap_md_pdetab_init(struct pmap *);
 bool   pmap_md_ok_to_steal_p(const uvm_physseg_t, size_t);
 
+extern vaddr_t pmap_direct_base;
+extern vaddr_t pmap_direct_end;
+#define PMAP_DIRECT_MAP(pa)    (pmap_direct_base + (pa))
+#define PMAP_DIRECT_UNMAP(va)  ((paddr_t)(va) - pmap_direct_base)
+
 #ifdef __PMAP_PRIVATE
 static inline void
 pmap_md_page_syncicache(struct vm_page *pg, const kcpuset_t *kc)
@@ -159,9 +164,6 @@
 #endif /* __PMAP_PRIVATE */
 #endif /* _KERNEL */
 
-#define POOL_VTOPHYS(va)       ((paddr_t)((vaddr_t)(va)-VM_MAX_KERNEL_ADDRESS))
-#define POOL_PHYSTOV(pa)       ((vaddr_t)(paddr_t)(pa)+VM_MAX_KERNEL_ADDRESS)
-
 #include <uvm/pmap/pmap.h>
 
 #endif /* !_MODULE */
diff -r eb3873ad51c2 -r f4814347a716 sys/arch/riscv/include/pte.h
--- a/sys/arch/riscv/include/pte.h      Sat Jun 15 15:22:56 2019 +0000
+++ b/sys/arch/riscv/include/pte.h      Sun Jun 16 07:42:52 2019 +0000
@@ -1,10 +1,11 @@
-/* $NetBSD: pte.h,v 1.2 2019/06/01 12:42:28 maxv Exp $ */
-/*-
- * Copyright (c) 2014 The NetBSD Foundation, Inc.
+/* $NetBSD: pte.h,v 1.3 2019/06/16 07:42:52 maxv Exp $ */
+
+/*
+ * Copyright (c) 2014, 2019 The NetBSD Foundation, Inc.
  * All rights reserved.
  *
  * This code is derived from software contributed to The NetBSD Foundation
- * by Matt Thomas of 3am Software Foundry.
+ * by Matt Thomas (of 3am Software Foundry) and Maxime Villard.
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
@@ -31,68 +32,63 @@
 #ifndef _RISCV_PTE_H_
 #define _RISCV_PTE_H_
 
-//
-// RV32 page table entry (4 GB VA space)
-//   [31..22] = PPN[1]
-//   [21..12] = PPN[0]
-//   [11.. 9] = software
-//
-// RV64 page table entry (4 TB VA space)
-//   [64..43] = 0
-//   [42..33] = PPN[2]
-//   [32..23] = PPN[1]
-//   [22..13] = PPN[0]
-//   [12.. 9] = software
-//
-// Common to both:
-//   [8] = SX
-//   [7] = SW
-//   [6] = SR
-//   [5] = UX
-//   [4] = UW
-//   [3] = UR



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