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[src/trunk]: src/sys Add support for Amlogic S905 (Meson GXBB) SoCs.



details:   https://anonhg.NetBSD.org/src/rev/c8797f5bd95f
branches:  trunk
changeset: 997182:c8797f5bd95f
user:      jmcneill <jmcneill%NetBSD.org@localhost>
date:      Mon Feb 25 19:30:17 2019 +0000

description:
Add support for Amlogic S905 (Meson GXBB) SoCs.

diffstat:

 sys/arch/arm/amlogic/files.meson                                       |    26 +-
 sys/arch/arm/amlogic/meson8b_clkc.c                                    |    45 +-
 sys/arch/arm/amlogic/meson_clk.c                                       |    68 +-
 sys/arch/arm/amlogic/meson_clk.h                                       |    21 +-
 sys/arch/arm/amlogic/meson_clk_div.c                                   |    36 +-
 sys/arch/arm/amlogic/meson_clk_gate.c                                  |     8 +-
 sys/arch/arm/amlogic/meson_clk_mpll.c                                  |     8 +-
 sys/arch/arm/amlogic/meson_clk_mux.c                                   |     7 +-
 sys/arch/arm/amlogic/meson_clk_pll.c                                   |     8 +-
 sys/arch/arm/amlogic/meson_dwmac.c                                     |     7 +-
 sys/arch/arm/amlogic/meson_pinctrl.c                                   |     8 +-
 sys/arch/arm/amlogic/meson_pinctrl.h                                   |     7 +-
 sys/arch/arm/amlogic/meson_platform.c                                  |    41 +-
 sys/arch/arm/amlogic/meson_resets.c                                    |     5 +-
 sys/arch/arm/amlogic/meson_usbphy.c                                    |    18 +-
 sys/arch/arm/amlogic/mesongx_mmc.c                                     |  1044 ++++++++++
 sys/arch/arm/amlogic/mesongxbb_aoclkc.c                                |   110 +
 sys/arch/arm/amlogic/mesongxbb_aoclkc.h                                |    47 +
 sys/arch/arm/amlogic/mesongxbb_clkc.c                                  |   244 ++
 sys/arch/arm/amlogic/mesongxbb_clkc.h                                  |   198 +
 sys/arch/arm/amlogic/mesongxbb_pinctrl.c                               |   519 ++++
 sys/arch/evbarm/conf/GENERIC                                           |     5 +-
 sys/arch/evbarm/conf/GENERIC64                                         |    24 +-
 sys/arch/evbarm/conf/files.generic64                                   |     3 +-
 sys/external/gpl2/dts/dist/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi |     4 +
 25 files changed, 2420 insertions(+), 91 deletions(-)

diffs (truncated from 3205 to 300 lines):

diff -r c7568dfb9fc0 -r c8797f5bd95f sys/arch/arm/amlogic/files.meson
--- a/sys/arch/arm/amlogic/files.meson  Mon Feb 25 19:28:36 2019 +0000
+++ b/sys/arch/arm/amlogic/files.meson  Mon Feb 25 19:30:17 2019 +0000
@@ -1,4 +1,4 @@
-#      $NetBSD: files.meson,v 1.4 2019/01/20 17:58:22 jmcneill Exp $
+#      $NetBSD: files.meson,v 1.5 2019/02/25 19:30:17 jmcneill Exp $
 #
 # Configuration info for Amlogic Meson family SoCs
 #
@@ -22,6 +22,16 @@
 attach meson8bclkc at fdt with meson8b_clkc
 file   arch/arm/amlogic/meson8b_clkc.c         meson8b_clkc
 
+# Meson GXBB clock controller
+device gxbbclkc: meson_clk
+attach gxbbclkc at fdt with mesongxbb_clkc
+file   arch/arm/amlogic/mesongxbb_clkc.c       mesongxbb_clkc
+
+# Meson GXBB AO clock controller
+device gxbbaoclkc: meson_clk
+attach gxbbaoclkc at fdt with mesongxbb_aoclkc
+file   arch/arm/amlogic/mesongxbb_aoclkc.c     mesongxbb_aoclkc
+
 # Meson reset controller
 device mesonresets
 attach mesonresets at fdt with meson_resets
@@ -33,7 +43,8 @@
 file   arch/arm/amlogic/meson_uart.c           meson_uart
 
 # Framebuffer console
-attach genfb at fdt with meson_genfb
+device mesonfb
+attach mesonfb at fdt with meson_genfb
 file   arch/arm/amlogic/meson_genfb.c          meson_genfb & soc_meson
 
 # GPIO
@@ -41,17 +52,23 @@
 attach mesonpinctrl at fdt with meson_pinctrl
 file   arch/arm/amlogic/meson_pinctrl.c        meson_pinctrl
 file   arch/arm/amlogic/meson8b_pinctrl.c      meson_pinctrl & soc_meson8b
+file   arch/arm/amlogic/mesongxbb_pinctrl.c    meson_pinctrl & soc_mesongxbb
 
-# SDHC
+# Meson8b SDHC
 device mesonsdhc: sdmmcbus
 attach mesonsdhc at fdt with meson_sdhc
 file   arch/arm/amlogic/meson_sdhc.c           meson_sdhc
 
-# SDIO
+# Meson8b SDIO
 device mesonsdio: sdmmcbus
 attach mesonsdio at fdt with meson_sdio
 file   arch/arm/amlogic/meson_sdio.c           meson_sdio
 
+# Meson GX MMC
+device mesongxmmc: sdmmcbus
+attach mesongxmmc at fdt with mesongx_mmc
+file   arch/arm/amlogic/mesongx_mmc.c          mesongx_mmc 
+
 # USB PHY
 device mesonusbphy
 attach mesonusbphy at fdt with meson_usbphy
@@ -79,3 +96,4 @@
 # SOC parameters
 defflag        opt_soc.h                       SOC_MESON
 defflag        opt_soc.h                       SOC_MESON8B: SOC_MESON
+defflag        opt_soc.h                       SOC_MESONGXBB: SOC_MESON
diff -r c7568dfb9fc0 -r c8797f5bd95f sys/arch/arm/amlogic/meson8b_clkc.c
--- a/sys/arch/arm/amlogic/meson8b_clkc.c       Mon Feb 25 19:28:36 2019 +0000
+++ b/sys/arch/arm/amlogic/meson8b_clkc.c       Mon Feb 25 19:30:17 2019 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: meson8b_clkc.c,v 1.2 2019/01/20 17:28:34 jmcneill Exp $ */
+/* $NetBSD: meson8b_clkc.c,v 1.3 2019/02/25 19:30:17 jmcneill Exp $ */
 
 /*-
  * Copyright (c) 2019 Jared McNeill <jmcneill%invisible.ca@localhost>
@@ -28,7 +28,7 @@
 
 #include <sys/cdefs.h>
 
-__KERNEL_RCSID(1, "$NetBSD: meson8b_clkc.c,v 1.2 2019/01/20 17:28:34 jmcneill Exp $");
+__KERNEL_RCSID(1, "$NetBSD: meson8b_clkc.c,v 1.3 2019/02/25 19:30:17 jmcneill Exp $");
 
 #include <sys/param.h>
 #include <sys/bus.h>
@@ -99,6 +99,7 @@
     struct meson_clk_clk *clk, u_int rate)
 {
        struct clk *clkp, *clkp_parent;
+       int error;
 
        KASSERT(clk->type == MESON_CLK_PLL);
 
@@ -115,6 +116,8 @@
        if (parent_rate == 0)
                return EIO;
 
+       CLK_LOCK(sc);
+
        uint32_t cntl0 = CLK_READ(sc, HHI_SYS_CPU_CLK_CNTL0);
        uint32_t cntl = CLK_READ(sc, HHI_SYS_PLL_CNTL);
 
@@ -130,12 +133,18 @@
                new_mul *= 2;
        }
 
-       if ((cntl0 & HHI_SYS_CPU_CLK_CNTL0_CLKSEL) == 0)
-               return EIO;
-       if (__SHIFTOUT(cntl0, HHI_SYS_CPU_CLK_CNTL0_PLLSEL) != 1)
-               return EIO;
-       if (__SHIFTOUT(cntl0, HHI_SYS_CPU_CLK_CNTL0_SOUTSEL) != 0)
-               return EIO;
+       if ((cntl0 & HHI_SYS_CPU_CLK_CNTL0_CLKSEL) == 0) {
+               error = EIO;
+               goto done;
+       }
+       if (__SHIFTOUT(cntl0, HHI_SYS_CPU_CLK_CNTL0_PLLSEL) != 1) {
+               error = EIO;
+               goto done;
+       }
+       if (__SHIFTOUT(cntl0, HHI_SYS_CPU_CLK_CNTL0_SOUTSEL) != 0) {
+               error = EIO;
+               goto done;
+       }
 
        cntl &= ~HHI_SYS_PLL_CNTL_MUL;
        cntl |= __SHIFTIN(new_mul, HHI_SYS_PLL_CNTL_MUL);
@@ -159,7 +168,12 @@
                CLK_WRITE(sc, HHI_SYS_CPU_CLK_CNTL0, cntl0);
        } while ((CLK_READ(sc, HHI_SYS_PLL_CNTL) & HHI_SYS_PLL_CNTL_LOCK) == 0);
 
-       return 0;
+       error = 0;
+
+done:
+       CLK_UNLOCK(sc);
+
+       return error;
 }
 
 static struct meson_clk_clk meson8b_clkc_clks[] = {
@@ -319,10 +333,20 @@
 {
        struct meson_clk_softc * const sc = device_private(self);
        struct fdt_attach_args * const faa = aux;
+       bus_addr_t addr;
+       bus_size_t size;
 
        sc->sc_dev = self;
        sc->sc_phandle = faa->faa_phandle;
        sc->sc_bst = faa->faa_bst;
+       if (fdtbus_get_reg(sc->sc_phandle, MESON8B_CLKC_REG_INDEX, &addr, &size) != 0) {
+               aprint_error(": couldn't get registers\n");
+               return;
+       }
+       if (bus_space_map(sc->sc_bst, addr, size, 0, &sc->sc_bsh) != 0) {
+               aprint_error(": couldn't map registers\n");
+               return;
+       }
 
        sc->sc_resets = meson8b_clkc_resets;
        sc->sc_nresets = __arraycount(meson8b_clkc_resets);
@@ -330,8 +354,7 @@
        sc->sc_clks = meson8b_clkc_clks;
        sc->sc_nclks = __arraycount(meson8b_clkc_clks);
 
-       if (meson_clk_attach(sc, MESON8B_CLKC_REG_INDEX) != 0)
-               return;
+       meson_clk_attach(sc);
 
        aprint_naive("\n");
        aprint_normal(": Meson8b clock controller\n");
diff -r c7568dfb9fc0 -r c8797f5bd95f sys/arch/arm/amlogic/meson_clk.c
--- a/sys/arch/arm/amlogic/meson_clk.c  Mon Feb 25 19:28:36 2019 +0000
+++ b/sys/arch/arm/amlogic/meson_clk.c  Mon Feb 25 19:30:17 2019 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: meson_clk.c,v 1.1 2019/01/19 20:56:03 jmcneill Exp $ */
+/* $NetBSD: meson_clk.c,v 1.2 2019/02/25 19:30:17 jmcneill Exp $ */
 
 /*-
  * Copyright (c) 2017-2019 Jared McNeill <jmcneill%invisible.ca@localhost>
@@ -27,7 +27,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: meson_clk.c,v 1.1 2019/01/19 20:56:03 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: meson_clk.c,v 1.2 2019/02/25 19:30:17 jmcneill Exp $");
 
 #include <sys/param.h>
 #include <sys/bus.h>
@@ -35,6 +35,7 @@
 #include <sys/device.h>
 
 #include <dev/fdt/fdtvar.h>
+#include <dev/fdt/syscon.h>
 
 #include <dev/clk/clk_backend.h>
 
@@ -72,8 +73,10 @@
        struct meson_clk_softc * const sc = device_private(dev);
        struct meson_clk_reset * const reset = priv;
 
+       CLK_LOCK(sc);
        const uint32_t val = CLK_READ(sc, reset->reg);
        CLK_WRITE(sc, reset->reg, val | reset->mask);
+       CLK_UNLOCK(sc);
 
        return 0;
 }
@@ -84,8 +87,10 @@
        struct meson_clk_softc * const sc = device_private(dev);
        struct meson_clk_reset * const reset = priv;
 
+       CLK_LOCK(sc);
        const uint32_t val = CLK_READ(sc, reset->reg);
        CLK_WRITE(sc, reset->reg, val & ~reset->mask);
+       CLK_UNLOCK(sc);
 
        return 0;
 }
@@ -298,22 +303,11 @@
        return NULL;
 }
 
-int
-meson_clk_attach(struct meson_clk_softc *sc, u_int reg_index)
+void
+meson_clk_attach(struct meson_clk_softc *sc)
 {
-       bus_addr_t addr;
-       bus_size_t size;
        int i;
 
-       if (fdtbus_get_reg(sc->sc_phandle, reg_index, &addr, &size) != 0) {
-               aprint_error(": couldn't get registers\n");
-               return ENXIO;
-       }
-       if (bus_space_map(sc->sc_bst, addr, size, 0, &sc->sc_bsh) != 0) {
-               aprint_error(": couldn't map registers\n");
-               return ENXIO;
-       }
-
        sc->sc_clkdom.name = device_xname(sc->sc_dev);
        sc->sc_clkdom.funcs = &meson_clk_clock_funcs;
        sc->sc_clkdom.priv = sc;
@@ -322,13 +316,13 @@
                clk_attach(&sc->sc_clks[i].base);
        }
 
-       fdtbus_register_clock_controller(sc->sc_dev, sc->sc_phandle,
-           &meson_clk_fdtclock_funcs);
+       if (sc->sc_nclks > 0)
+               fdtbus_register_clock_controller(sc->sc_dev, sc->sc_phandle,
+                   &meson_clk_fdtclock_funcs);
 
-       fdtbus_register_reset_controller(sc->sc_dev, sc->sc_phandle,
-           &meson_clk_fdtreset_funcs);
-
-       return 0;
+       if (sc->sc_nresets > 0)
+               fdtbus_register_reset_controller(sc->sc_dev, sc->sc_phandle,
+                   &meson_clk_fdtreset_funcs);
 }
 
 void
@@ -367,3 +361,35 @@
                aprint_debug("%10u Hz\n", clk_get_rate(&clk->base));
        }
 }
+
+void
+meson_clk_lock(struct meson_clk_softc *sc)
+{
+       if (sc->sc_syscon != NULL)
+               syscon_lock(sc->sc_syscon);
+}
+
+void
+meson_clk_unlock(struct meson_clk_softc *sc)
+{
+       if (sc->sc_syscon != NULL)
+               syscon_unlock(sc->sc_syscon);
+}
+
+uint32_t
+meson_clk_read(struct meson_clk_softc *sc, bus_size_t reg)
+{
+       if (sc->sc_syscon != NULL)
+               return syscon_read_4(sc->sc_syscon, reg);
+       else
+               return bus_space_read_4(sc->sc_bst, sc->sc_bsh, reg);
+}
+
+void
+meson_clk_write(struct meson_clk_softc *sc, bus_size_t reg, uint32_t val)
+{
+       if (sc->sc_syscon != NULL)
+               syscon_write_4(sc->sc_syscon, reg, val);
+       else
+               bus_space_write_4(sc->sc_bst, sc->sc_bsh, reg, val);



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