[src/trunk]: src/sys/arch/arm default RK3399 PCIe to 1.x.

[mrg <mrg%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/38a9abd44cd2
branches:  trunk
changeset: 988200:38a9abd44cd2
user:      mrg <mrg%NetBSD.org@localhost>
date:      Sat Oct 02 20:41:47 2021 +0000

description:
default RK3399 PCIe to 1.x.

sometime in mid-2019, rockchip disabled PCIe 2.x referrencing a
non-public errata in linux and the dts, both of which were changed
to default to only PCIe 1.x (in code, and in DT.)  see:

   https://lore.kernel.org/all/1481881357-1793-1-git-send-email-shawn.lin%rock-chips.com@localhost/

we haven't observed any specific problems, but we've also tested
far fewer cards than linux.  there are other issues such as what
happens for a PCI abort depending on which CPU triggers it we do
not currently handle either.

tested on rockpro64 with nvme & ahcisata, and pinebook pro nvme.

still allows DT to set back to '2' if the user so desires.

diffstat:

 sys/arch/arm/dts/rk3399-pinebook-pro.dts |   1 -
 sys/arch/arm/dts/rk3399-rockpro64.dts    |   3 +--
 sys/arch/arm/rockchip/rk3399_pcie.c      |  15 ++++++++++++---
 3 files changed, 13 insertions(+), 6 deletions(-)

diffs (65 lines):

diff -r f5270ba17a57 -r 38a9abd44cd2 sys/arch/arm/dts/rk3399-pinebook-pro.dts
--- a/sys/arch/arm/dts/rk3399-pinebook-pro.dts  Sat Oct 02 18:39:15 2021 +0000
+++ b/sys/arch/arm/dts/rk3399-pinebook-pro.dts  Sat Oct 02 20:41:47 2021 +0000
@@ -766,7 +766,6 @@
 &pcie0 {
        ep-gpios = <&gpio2 RK_PD4 GPIO_ACTIVE_HIGH>;
        num-lanes = <4>;
-       max-link-speed = <2>;
        pinctrl-names = "default";
        pinctrl-0 = <&pcie_clkreqn_cpm>;
        vpcie3v3-supply = <&vcc3v3_pcie>;
diff -r f5270ba17a57 -r 38a9abd44cd2 sys/arch/arm/dts/rk3399-rockpro64.dts
--- a/sys/arch/arm/dts/rk3399-rockpro64.dts     Sat Oct 02 18:39:15 2021 +0000
+++ b/sys/arch/arm/dts/rk3399-rockpro64.dts     Sat Oct 02 20:41:47 2021 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: rk3399-rockpro64.dts,v 1.12 2021/09/03 01:21:48 mrg Exp $ */
+/* $NetBSD: rk3399-rockpro64.dts,v 1.13 2021/10/02 20:41:47 mrg Exp $ */
 
 /*-
  * Copyright (c) 2019 Jared McNeill <jmcneill%invisible.ca@localhost>
@@ -181,7 +181,6 @@
 &pcie0 {
        ep-gpios = <&gpio2 RK_PD4 GPIO_ACTIVE_HIGH>;
        num-lanes = <4>;
-       max-link-speed = <2>;
        pinctrl-names = "default";
        pinctrl-0 = <&pcie_clkreqn>;
        vpcie3v3-supply = <&vcc3v3_pcie>;
diff -r f5270ba17a57 -r 38a9abd44cd2 sys/arch/arm/rockchip/rk3399_pcie.c
--- a/sys/arch/arm/rockchip/rk3399_pcie.c       Sat Oct 02 18:39:15 2021 +0000
+++ b/sys/arch/arm/rockchip/rk3399_pcie.c       Sat Oct 02 20:41:47 2021 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: rk3399_pcie.c,v 1.17 2021/09/06 14:03:17 jmcneill Exp $ */
+/* $NetBSD: rk3399_pcie.c,v 1.18 2021/10/02 20:41:47 mrg Exp $ */
 /*
  * Copyright (c) 2018 Mark Kettenis <kettenis%openbsd.org@localhost>
  *
@@ -17,7 +17,7 @@
 
 #include <sys/cdefs.h>
 
-__KERNEL_RCSID(1, "$NetBSD: rk3399_pcie.c,v 1.17 2021/09/06 14:03:17 jmcneill Exp $");
+__KERNEL_RCSID(1, "$NetBSD: rk3399_pcie.c,v 1.18 2021/10/02 20:41:47 mrg Exp $");
 
 #include <sys/param.h>
 #include <sys/systm.h>
@@ -255,8 +255,17 @@
 
        ep_gpio = fdtbus_gpio_acquire(phandle, "ep-gpios", GPIO_PIN_OUTPUT);
 
+       /*
+        * Let board-specific properties override the default, which is set
+        * to PCIe 1.x, due to errata in the RK3399 CPU.  We don't know exactly
+        * what these errata involved (not public), but posts from the
+        * @rock-chips.com domain to u-boot and linux-kernel lists indicate
+        * that there is a errata related to this, and indeed, the Datasheet
+        * since at least Rev 1.6 and inluding the latest Rev 1.8 say that the
+        * PCIe can handle 2.5GT/s (ie, PCIe 1.x).
+        */
        if (of_getprop_uint32(phandle, "max-link-speed", &max_link_speed) != 0)
-               max_link_speed = 2;
+               max_link_speed = 1;
        if (of_getprop_uint32(phandle, "num-lanes", &num_lanes) != 0)
                num_lanes = 1;