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[src/trunk]: src/sys/arch Add a per-CPU event counter that counts every time ...



details:   https://anonhg.NetBSD.org/src/rev/13dfbbbb6141
branches:  trunk
changeset: 978403:13dfbbbb6141
user:      jmcneill <jmcneill%NetBSD.org@localhost>
date:      Sat Nov 21 11:43:59 2020 +0000

description:
Add a per-CPU event counter that counts every time an interrupt handler is
preempted by a higher priority interrupt.

diffstat:

 sys/arch/aarch64/include/cpu.h |   3 ++-
 sys/arch/arm/cortex/gicv3.c    |  12 ++++++++++--
 2 files changed, 12 insertions(+), 3 deletions(-)

diffs (61 lines):

diff -r 41b2d391be6c -r 13dfbbbb6141 sys/arch/aarch64/include/cpu.h
--- a/sys/arch/aarch64/include/cpu.h    Sat Nov 21 11:41:54 2020 +0000
+++ b/sys/arch/aarch64/include/cpu.h    Sat Nov 21 11:43:59 2020 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: cpu.h,v 1.28 2020/10/01 06:40:16 ryo Exp $ */
+/* $NetBSD: cpu.h,v 1.29 2020/11/21 11:43:59 jmcneill Exp $ */
 
 /*-
  * Copyright (c) 2014, 2020 The NetBSD Foundation, Inc.
@@ -112,6 +112,7 @@
        struct evcnt ci_vfp_save;
        struct evcnt ci_vfp_release;
        struct evcnt ci_uct_trap;
+       struct evcnt ci_intr_preempt;
 
        /* FDT or similar supplied "cpu capacity" */
        uint32_t ci_capacity_dmips_mhz;
diff -r 41b2d391be6c -r 13dfbbbb6141 sys/arch/arm/cortex/gicv3.c
--- a/sys/arch/arm/cortex/gicv3.c       Sat Nov 21 11:41:54 2020 +0000
+++ b/sys/arch/arm/cortex/gicv3.c       Sat Nov 21 11:43:59 2020 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: gicv3.c,v 1.32 2020/11/01 14:30:12 jmcneill Exp $ */
+/* $NetBSD: gicv3.c,v 1.33 2020/11/21 11:44:00 jmcneill Exp $ */
 
 /*-
  * Copyright (c) 2018 Jared McNeill <jmcneill%invisible.ca@localhost>
@@ -31,7 +31,7 @@
 #define        _INTR_PRIVATE
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: gicv3.c,v 1.32 2020/11/01 14:30:12 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: gicv3.c,v 1.33 2020/11/21 11:44:00 jmcneill Exp $");
 
 #include <sys/param.h>
 #include <sys/kernel.h>
@@ -368,6 +368,9 @@
        struct gicv3_softc * const sc = PICTOSOFTC(pic);
        uint32_t icc_sre, icc_ctlr, gicr_waker;
 
+       evcnt_attach_dynamic(&ci->ci_intr_preempt, EVCNT_TYPE_MISC, NULL,
+           ci->ci_cpuname, "intr preempt");
+
        ci->ci_gic_redist = gicv3_find_redist(sc);
        ci->ci_gic_sgir = gicv3_sgir(sc);
 
@@ -734,10 +737,15 @@
                        isb();
                }
 
+               const int64_t nintr = ci->ci_data.cpu_nintr;
+
                cpsie(I32_bit);
                pic_dispatch(is, frame);
                cpsid(I32_bit);
 
+               if (nintr != ci->ci_data.cpu_nintr)
+                       ci->ci_intr_preempt.ev_count++;
+
                if (!early_eoi) {
                        icc_eoi1r_write(iar);
                        isb();



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