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[src/trunk]: src/sys/arch/mips/cavium Simplify interrupt definition: remove m...



details:   https://anonhg.NetBSD.org/src/rev/96e12bf8328e
branches:  trunk
changeset: 973076:96e12bf8328e
user:      simonb <simonb%NetBSD.org@localhost>
date:      Fri Jun 19 02:23:43 2020 +0000

description:
Simplify interrupt definition: remove mostly unused masks and just
configure everything using interrupt numbers.

diffstat:

 sys/arch/mips/cavium/dev/octeon_ciureg.h |  312 +++++++++---------------------
 sys/arch/mips/cavium/dev/octeon_dwctwo.c |    7 +-
 sys/arch/mips/cavium/dev/octeon_gmx.c    |    9 +-
 sys/arch/mips/cavium/dev/octeon_ipd.c    |    9 +-
 sys/arch/mips/cavium/dev/octeon_mpi.c    |    7 +-
 sys/arch/mips/cavium/dev/octeon_pci.c    |    8 +-
 sys/arch/mips/cavium/dev/octeon_pow.c    |    6 +-
 sys/arch/mips/cavium/dev/octeon_uart.c   |    7 +-
 sys/arch/mips/cavium/octeon_intr.c       |   23 +-
 9 files changed, 129 insertions(+), 259 deletions(-)

diffs (truncated from 642 to 300 lines):

diff -r 62e279bcc9cc -r 96e12bf8328e sys/arch/mips/cavium/dev/octeon_ciureg.h
--- a/sys/arch/mips/cavium/dev/octeon_ciureg.h  Fri Jun 19 01:19:50 2020 +0000
+++ b/sys/arch/mips/cavium/dev/octeon_ciureg.h  Fri Jun 19 02:23:43 2020 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: octeon_ciureg.h,v 1.6 2020/06/02 14:39:57 simonb Exp $ */
+/*     $NetBSD: octeon_ciureg.h,v 1.7 2020/06/19 02:23:43 simonb Exp $ */
 
 /*
  * Copyright (c) 2007 Internet Initiative Japan, Inc.
@@ -56,7 +56,7 @@
 #define        CIU_TIM2                                UINT64_C(0x0001070000000490)
 #define        CIU_TIM3                                UINT64_C(0x0001070000000498)
 #define        CIU_WDOG0                               UINT64_C(0x0001070000000500)
-#define        CIU_WDOG1                               UINT64_C(0x0001070000000508)
+#define        CIU_WDOG(n)                             (CIU_WDOG0 + (n) * 8)
 #define        CIU_PP_POKE0                            UINT64_C(0x0001070000000580)
 #define        CIU_PP_POKE1                            UINT64_C(0x0001070000000588)
 #define        CIU_MBOX_SET0                           UINT64_C(0x0001070000000600)
@@ -125,213 +125,89 @@
 
 /* ---- register bits */
 
-/* ``interrupt bits'' shift values */
-
-#define        _CIU_INT_XXX_63_SHIFT                   0x3f
-#define        _CIU_INT_XXX_62_SHIFT                   0x3e
-#define        _CIU_INT_XXX_61_SHIFT                   0x3d
-#define        _CIU_INT_XXX_60_SHIFT                   0x3c
-#define        _CIU_INT_XXX_59_SHIFT                   0x3b
-#define        _CIU_INT_MPI_SHIFT                      0x3a
-#define        _CIU_INT_PCM_SHIFT                      0x39
-#define        _CIU_INT_USB_SHIFT                      0x38
-#define        _CIU_INT_TIMER_3_SHIFT                  0x37
-#define        _CIU_INT_TIMER_2_SHIFT                  0x36
-#define        _CIU_INT_TIMER_1_SHIFT                  0x35
-#define        _CIU_INT_TIMER_0_SHIFT                  0x34
-#define        _CIU_INT_XXX_51_SHIFT                   0x33
-#define        _CIU_INT_IPD_DRP_SHIFT                  0x32
-#define        _CIU_INT_GMX_DRP_SHIFT                  0x30
-#define        _CIU_INT_TRACE_SHIFT                    0x2f
-#define        _CIU_INT_RML_SHIFT                      0x2e
-#define        _CIU_INT_TWSI_SHIFT                     0x2d
-#define        _CIU_INT_WDOG_SUM_SHIFT                 0x2c
-#define        _CIU_INT_PCI_MSI_63_48_SHIFT            0x2b
-#define        _CIU_INT_PCI_MSI_47_32_SHIFT            0x2a
-#define        _CIU_INT_PCI_MSI_31_16_SHIFT            0x29
-#define        _CIU_INT_PCI_MSI_15_0_SHIFT             0x28
-#define        _CIU_INT_PCI_INT_D_SHIFT                0x27
-#define        _CIU_INT_PCI_INT_C_SHIFT                0x26
-#define        _CIU_INT_PCI_INT_B_SHIFT                0x25
-#define        _CIU_INT_PCI_INT_A_SHIFT                0x24
-#define        _CIU_INT_UART_1_SHIFT                   0x23
-#define        _CIU_INT_UART_0_SHIFT                   0x22
-#define        _CIU_INT_MBOX_31_16_SHIFT               0x21
-#define        _CIU_INT_MBOX_15_0_SHIFT                0x20
-#define        _CIU_INT_GPIO_15_SHIFT                  0x1f
-#define        _CIU_INT_GPIO_14_SHIFT                  0x1e
-#define        _CIU_INT_GPIO_13_SHIFT                  0x1d
-#define        _CIU_INT_GPIO_12_SHIFT                  0x1c
-#define        _CIU_INT_GPIO_11_SHIFT                  0x1b
-#define        _CIU_INT_GPIO_10_SHIFT                  0x1a
-#define        _CIU_INT_GPIO_9_SHIFT                   0x19
-#define        _CIU_INT_GPIO_8_SHIFT                   0x18
-#define        _CIU_INT_GPIO_7_SHIFT                   0x17
-#define        _CIU_INT_GPIO_6_SHIFT                   0x16
-#define        _CIU_INT_GPIO_5_SHIFT                   0x15
-#define        _CIU_INT_GPIO_4_SHIFT                   0x14
-#define        _CIU_INT_GPIO_3_SHIFT                   0x13
-#define        _CIU_INT_GPIO_2_SHIFT                   0x12
-#define        _CIU_INT_GPIO_1_SHIFT                   0x11
-#define        _CIU_INT_GPIO_0_SHIFT                   0x10
-#define        _CIU_INT_WORKQ_15_SHIFT                 0x0f
-#define        _CIU_INT_WORKQ_14_SHIFT                 0x0e
-#define        _CIU_INT_WORKQ_13_SHIFT                 0x0d
-#define        _CIU_INT_WORKQ_12_SHIFT                 0x0c
-#define        _CIU_INT_WORKQ_11_SHIFT                 0x0b
-#define        _CIU_INT_WORKQ_10_SHIFT                 0x0a
-#define        _CIU_INT_WORKQ_9_SHIFT                  0x09
-#define        _CIU_INT_WORKQ_8_SHIFT                  0x08
-#define        _CIU_INT_WORKQ_7_SHIFT                  0x07
-#define        _CIU_INT_WORKQ_6_SHIFT                  0x06
-#define        _CIU_INT_WORKQ_5_SHIFT                  0x05
-#define        _CIU_INT_WORKQ_4_SHIFT                  0x04
-#define        _CIU_INT_WORKQ_3_SHIFT                  0x03
-#define        _CIU_INT_WORKQ_2_SHIFT                  0x02
-#define        _CIU_INT_WORKQ_1_SHIFT                  0x01
-#define        _CIU_INT_WORKQ_0_SHIFT                  0x00
+/* interrupt numbers */
 
-#define        CIU_INTX_SUM0_XXX_63_59                 UINT64_C(0xf800000000000000)
-#define        CIU_INTX_SUM0_MPI                       UINT64_C(0x0400000000000000)
-#define        CIU_INTX_SUM0_PCM                       UINT64_C(0x0200000000000000)
-#define        CIU_INTX_SUM0_USB                       UINT64_C(0x0100000000000000)
-#define        CIU_INTX_SUM0_TIMER                     UINT64_C(0x00f0000000000000)
-#define         CIU_INTX_SUM0_TIMER_3                  UINT64_C(0x0080000000000000)
-#define         CIU_INTX_SUM0_TIMER_2                  UINT64_C(0x0040000000000000)
-#define         CIU_INTX_SUM0_TIMER_1                  UINT64_C(0x0020000000000000)
-#define         CIU_INTX_SUM0_TIMER_0                  UINT64_C(0x0010000000000000)
-#define        CIU_INTX_SUM0_XXX_51                    UINT64_C(0x0008000000000000)
-#define        CIU_INTX_SUM0_IPD_DRP                   UINT64_C(0x0004000000000000)
-#define        CIU_INTX_SUM0_XXX_49                    UINT64_C(0x0002000000000000)
-#define        CIU_INTX_SUM0_GMX_DRP                   UINT64_C(0x0001000000000000)
-#define        CIU_INTX_SUM0_TRACE                     UINT64_C(0x0000800000000000)
-#define        CIU_INTX_SUM0_RML                       UINT64_C(0x0000400000000000)
-#define        CIU_INTX_SUM0_TWSI                      UINT64_C(0x0000200000000000)
-#define        CIU_INTX_SUM0_WDOG_SUM                  UINT64_C(0x0000100000000000)
-#define        CIU_INTX_SUM0_PCI_MSI                   UINT64_C(0x00000f0000000000)
-#define         CIU_INTX_SUM0_PCI_MSI_63_48            UINT64_C(0x0000080000000000)
-#define         CIU_INTX_SUM0_PCI_MSI_47_32            UINT64_C(0x0000040000000000)
-#define         CIU_INTX_SUM0_PCI_MSI_31_16            UINT64_C(0x0000020000000000)
-#define         CIU_INTX_SUM0_PCI_MSI_15_0             UINT64_C(0x0000010000000000)
-#define        CIU_INTX_SUM0_PCI_INT                   UINT64_C(0x000000f000000000)
-#define         CIU_INTX_SUM0_PCI_INT_D                UINT64_C(0x0000008000000000)
-#define         CIU_INTX_SUM0_PCI_INT_C                UINT64_C(0x0000004000000000)
-#define         CIU_INTX_SUM0_PCI_INT_B                UINT64_C(0x0000002000000000)
-#define         CIU_INTX_SUM0_PCI_INT_A                UINT64_C(0x0000001000000000)
-#define        CIU_INTX_SUM0_UART                      UINT64_C(0x0000000c00000000)
-#define         CIU_INTX_SUM0_UART_1                   UINT64_C(0x0000000800000000)
-#define         CIU_INTX_SUM0_UART_0                   UINT64_C(0x0000000400000000)
-#define        CIU_INTX_SUM0_MBOX                      UINT64_C(0x0000000300000000)
-#define         CIU_INTX_SUM0_MBOX_31_16               UINT64_C(0x0000000200000000)
-#define         CIU_INTX_SUM0_MBOX_15_0                UINT64_C(0x0000000100000000)
-#define        CIU_INTX_SUM0_GPIO                      UINT64_C(0x00000000ffff0000)
-#define         CIU_INTX_SUM0_GPIO_15                  UINT64_C(0x0000000080000000)
-#define         CIU_INTX_SUM0_GPIO_14                  UINT64_C(0x0000000040000000)
-#define         CIU_INTX_SUM0_GPIO_13                  UINT64_C(0x0000000020000000)
-#define         CIU_INTX_SUM0_GPIO_12                  UINT64_C(0x0000000010000000)
-#define         CIU_INTX_SUM0_GPIO_11                  UINT64_C(0x0000000008000000)
-#define         CIU_INTX_SUM0_GPIO_10                  UINT64_C(0x0000000004000000)
-#define         CIU_INTX_SUM0_GPIO_9                   UINT64_C(0x0000000002000000)
-#define         CIU_INTX_SUM0_GPIO_8                   UINT64_C(0x0000000001000000)
-#define         CIU_INTX_SUM0_GPIO_7                   UINT64_C(0x0000000000800000)
-#define         CIU_INTX_SUM0_GPIO_6                   UINT64_C(0x0000000000400000)
-#define         CIU_INTX_SUM0_GPIO_5                   UINT64_C(0x0000000000200000)
-#define         CIU_INTX_SUM0_GPIO_4                   UINT64_C(0x0000000000100000)
-#define         CIU_INTX_SUM0_GPIO_3                   UINT64_C(0x0000000000080000)
-#define         CIU_INTX_SUM0_GPIO_2                   UINT64_C(0x0000000000040000)
-#define         CIU_INTX_SUM0_GPIO_1                   UINT64_C(0x0000000000020000)
-#define         CIU_INTX_SUM0_GPIO_0                   UINT64_C(0x0000000000010000)
-#define        CIU_INTX_SUM0_WORKQ                     UINT64_C(0x000000000000ffff)
-#define         CIU_INTX_SUM0_WORKQ_15                 UINT64_C(0x0000000000008000)
-#define         CIU_INTX_SUM0_WORKQ_14                 UINT64_C(0x0000000000004000)
-#define         CIU_INTX_SUM0_WORKQ_13                 UINT64_C(0x0000000000002000)
-#define         CIU_INTX_SUM0_WORKQ_12                 UINT64_C(0x0000000000001000)
-#define         CIU_INTX_SUM0_WORKQ_11                 UINT64_C(0x0000000000000800)
-#define         CIU_INTX_SUM0_WORKQ_10                 UINT64_C(0x0000000000000400)
-#define         CIU_INTX_SUM0_WORKQ_9                  UINT64_C(0x0000000000000200)
-#define         CIU_INTX_SUM0_WORKQ_8                  UINT64_C(0x0000000000000100)
-#define         CIU_INTX_SUM0_WORKQ_7                  UINT64_C(0x0000000000000080)
-#define         CIU_INTX_SUM0_WORKQ_6                  UINT64_C(0x0000000000000040)
-#define         CIU_INTX_SUM0_WORKQ_5                  UINT64_C(0x0000000000000020)
-#define         CIU_INTX_SUM0_WORKQ_4                  UINT64_C(0x0000000000000010)
-#define         CIU_INTX_SUM0_WORKQ_3                  UINT64_C(0x0000000000000008)
-#define         CIU_INTX_SUM0_WORKQ_2                  UINT64_C(0x0000000000000004)
-#define         CIU_INTX_SUM0_WORKQ_1                  UINT64_C(0x0000000000000002)
-#define         CIU_INTX_SUM0_WORKQ_0                  UINT64_C(0x0000000000000001)
-
-#define        CIU_INT_SUM1_XXX_63_1                   UINT64_C(0xfffffffffffffffe)
-#define        CIU_INT_SUM1_WDOG                       UINT64_C(0x0000000000000001)
+#define        CIU_INT_BOOTDMA                         63
+#define        CIU_INT_MII                             62
+#define        CIU_INT_IPDPPTHR                        61
+#define        CIU_INT_POWIQ                           60
+#define        CIU_INT_TWSI2                           59
+#define        CIU_INT_MPI                             58
+#define        CIU_INT_PCM                             57
+#define        CIU_INT_USB                             56
+#define        CIU_INT_TIMER_3                         55
+#define        CIU_INT_TIMER_2                         54
+#define        CIU_INT_TIMER_1                         53
+#define        CIU_INT_TIMER_0                         52
+#define        CIU_INT_KEY_ZERO                        51
+#define        CIU_INT_IPD_DRP                         50
+#define        CIU_INT_GMX_DRP2                        49
+#define        CIU_INT_GMX_DRP                         48
+#define        CIU_INT_TRACE                           47
+#define        CIU_INT_RML                             46
+#define        CIU_INT_TWSI                            45
+#define        CIU_INT_WDOG_SUM                        44
+#define        CIU_INT_PCI_MSI_63_48                   43
+#define        CIU_INT_PCI_MSI_47_32                   42
+#define        CIU_INT_PCI_MSI_31_16                   41
+#define        CIU_INT_PCI_MSI_15_0                    40
+#define        CIU_INT_PCI_INT_D                       39
+#define        CIU_INT_PCI_INT_C                       38
+#define        CIU_INT_PCI_INT_B                       37
+#define        CIU_INT_PCI_INT_A                       36
+#define        CIU_INT_UART_1                          35
+#define        CIU_INT_UART_0                          34
+#define        CIU_INT_MBOX_31_16                      33
+#define        CIU_INT_MBOX_15_0                       32
+#define        CIU_INT_GPIO_15                         31
+#define        CIU_INT_GPIO_14                         30
+#define        CIU_INT_GPIO_13                         29
+#define        CIU_INT_GPIO_12                         28
+#define        CIU_INT_GPIO_11                         27
+#define        CIU_INT_GPIO_10                         26
+#define        CIU_INT_GPIO_9                          25
+#define        CIU_INT_GPIO_8                          24
+#define        CIU_INT_GPIO_7                          23
+#define        CIU_INT_GPIO_6                          22
+#define        CIU_INT_GPIO_5                          21
+#define        CIU_INT_GPIO_4                          20
+#define        CIU_INT_GPIO_3                          19
+#define        CIU_INT_GPIO_2                          18
+#define        CIU_INT_GPIO_1                          17
+#define        CIU_INT_GPIO_0                          16
+#define        CIU_INT_WORKQ_15                        15
+#define        CIU_INT_WORKQ_14                        14
+#define        CIU_INT_WORKQ_13                        13
+#define        CIU_INT_WORKQ_12                        12
+#define        CIU_INT_WORKQ_11                        11
+#define        CIU_INT_WORKQ_10                        10
+#define        CIU_INT_WORKQ_9                          9
+#define        CIU_INT_WORKQ_8                          8
+#define        CIU_INT_WORKQ_7                          7
+#define        CIU_INT_WORKQ_6                          6
+#define        CIU_INT_WORKQ_5                          5
+#define        CIU_INT_WORKQ_4                          4
+#define        CIU_INT_WORKQ_3                          3
+#define        CIU_INT_WORKQ_2                          2
+#define        CIU_INT_WORKQ_1                          1
+#define        CIU_INT_WORKQ_0                          0
 
-#define        CIU_INTX_EN0_XXX_63_59                  UINT64_C(0xf800000000000000)
-#define        CIU_INTX_EN0_MPI                        UINT64_C(0x0400000000000000)
-#define        CIU_INTX_EN0_PCM                        UINT64_C(0x0200000000000000)
-#define        CIU_INTX_EN0_USB                        UINT64_C(0x0100000000000000)
-#define        CIU_INTX_EN0_TIMER                      UINT64_C(0x00f0000000000000)
-#define         CIU_INTX_EN0_TIMER_3                   UINT64_C(0x0080000000000000)
-#define         CIU_INTX_EN0_TIMER_2                   UINT64_C(0x0040000000000000)
-#define         CIU_INTX_EN0_TIMER_1                   UINT64_C(0x0020000000000000)
-#define         CIU_INTX_EN0_TIMER_0                   UINT64_C(0x0010000000000000)
-#define        CIU_INTX_EN0_XXX_51                     UINT64_C(0x0008000000000000)
-#define        CIU_INTX_EN0_IPD_DRP                    UINT64_C(0x0004000000000000)
-#define        CIU_INTX_EN0_XXX_49                     UINT64_C(0x0002000000000000)
-#define        CIU_INTX_EN0_GMX_DRP                    UINT64_C(0x0001000000000000)
-#define        CIU_INTX_EN0_TRACE                      UINT64_C(0x0000800000000000)
-#define        CIU_INTX_EN0_RML                        UINT64_C(0x0000400000000000)
-#define        CIU_INTX_EN0_TWSI                       UINT64_C(0x0000200000000000)
-#define        CIU_INTX_EN0_WDOG_SUM                   UINT64_C(0x0000100000000000)
-#define        CIU_INTX_EN0_PCI_MSI                    UINT64_C(0x00000f0000000000)
-#define         CIU_INTX_EN0_PCI_MSI_63_48             UINT64_C(0x0000080000000000)
-#define         CIU_INTX_EN0_PCI_MSI_47_32             UINT64_C(0x0000040000000000)
-#define         CIU_INTX_EN0_PCI_MSI_31_16             UINT64_C(0x0000020000000000)
-#define         CIU_INTX_EN0_PCI_MSI_15_0              UINT64_C(0x0000010000000000)
-#define        CIU_INTX_EN0_PCI_INT                    UINT64_C(0x000000f000000000)
-#define         CIU_INTX_EN0_PCI_INT_D                 UINT64_C(0x0000008000000000)
-#define         CIU_INTX_EN0_PCI_INT_C                 UINT64_C(0x0000004000000000)
-#define         CIU_INTX_EN0_PCI_INT_B                 UINT64_C(0x0000002000000000)
-#define         CIU_INTX_EN0_PCI_INT_A                 UINT64_C(0x0000001000000000)
-#define        CIU_INTX_EN0_UART                       UINT64_C(0x0000000c00000000)
-#define         CIU_INTX_EN0_UART_1                    UINT64_C(0x0000000800000000)
-#define         CIU_INTX_EN0_UART_0                    UINT64_C(0x0000000400000000)
-#define        CIU_INTX_EN0_MBOX                       UINT64_C(0x0000000300000000)
-#define         CIU_INTX_EN0_MBOX_31_16                UINT64_C(0x0000000200000000)
-#define         CIU_INTX_EN0_MBOX_15_0                 UINT64_C(0x0000000100000000)
-#define        CIU_INTX_EN0_GPIO                       UINT64_C(0x00000000ffff0000)
-#define         CIU_INTX_EN0_GPIO_15                   UINT64_C(0x0000000080000000)
-#define         CIU_INTX_EN0_GPIO_14                   UINT64_C(0x0000000040000000)
-#define         CIU_INTX_EN0_GPIO_13                   UINT64_C(0x0000000020000000)
-#define         CIU_INTX_EN0_GPIO_12                   UINT64_C(0x0000000010000000)
-#define         CIU_INTX_EN0_GPIO_11                   UINT64_C(0x0000000008000000)
-#define         CIU_INTX_EN0_GPIO_10                   UINT64_C(0x0000000004000000)
-#define         CIU_INTX_EN0_GPIO_9                    UINT64_C(0x0000000002000000)
-#define         CIU_INTX_EN0_GPIO_8                    UINT64_C(0x0000000001000000)
-#define         CIU_INTX_EN0_GPIO_7                    UINT64_C(0x0000000000800000)
-#define         CIU_INTX_EN0_GPIO_6                    UINT64_C(0x0000000000400000)
-#define         CIU_INTX_EN0_GPIO_5                    UINT64_C(0x0000000000200000)
-#define         CIU_INTX_EN0_GPIO_4                    UINT64_C(0x0000000000100000)
-#define         CIU_INTX_EN0_GPIO_3                    UINT64_C(0x0000000000080000)
-#define         CIU_INTX_EN0_GPIO_2                    UINT64_C(0x0000000000040000)
-#define         CIU_INTX_EN0_GPIO_1                    UINT64_C(0x0000000000020000)
-#define         CIU_INTX_EN0_GPIO_0                    UINT64_C(0x0000000000010000)
-#define        CIU_INTX_EN0_WORKQ                      UINT64_C(0x000000000000ffff)
-#define         CIU_INTX_EN0_WORKQ_15                  UINT64_C(0x0000000000008000)
-#define         CIU_INTX_EN0_WORKQ_14                  UINT64_C(0x0000000000004000)
-#define         CIU_INTX_EN0_WORKQ_13                  UINT64_C(0x0000000000002000)
-#define         CIU_INTX_EN0_WORKQ_12                  UINT64_C(0x0000000000001000)
-#define         CIU_INTX_EN0_WORKQ_11                  UINT64_C(0x0000000000000800)
-#define         CIU_INTX_EN0_WORKQ_10                  UINT64_C(0x0000000000000400)
-#define         CIU_INTX_EN0_WORKQ_9                   UINT64_C(0x0000000000000200)
-#define         CIU_INTX_EN0_WORKQ_8                   UINT64_C(0x0000000000000100)
-#define         CIU_INTX_EN0_WORKQ_7                   UINT64_C(0x0000000000000080)
-#define         CIU_INTX_EN0_WORKQ_6                   UINT64_C(0x0000000000000040)
-#define         CIU_INTX_EN0_WORKQ_5                   UINT64_C(0x0000000000000020)
-#define         CIU_INTX_EN0_WORKQ_4                   UINT64_C(0x0000000000000010)
-#define         CIU_INTX_EN0_WORKQ_3                   UINT64_C(0x0000000000000008)
-#define         CIU_INTX_EN0_WORKQ_2                   UINT64_C(0x0000000000000004)
-#define         CIU_INTX_EN0_WORKQ_1                   UINT64_C(0x0000000000000002)
-#define         CIU_INTX_EN0_WORKQ_0                   UINT64_C(0x0000000000000001)
-
-#define        CIU_INTX_EN1_XXX_63_1                   UINT64_C(0xfffffffffffffffe)
-#define        CIU_INTX_EN1_WDOG                       UINT64_C(0x0000000000000001)
+#define        CUI_INT_WDOG_15                          15
+#define        CUI_INT_WDOG_14                          14
+#define        CUI_INT_WDOG_13                          13
+#define        CUI_INT_WDOG_12                          12
+#define        CUI_INT_WDOG_11                          11
+#define        CUI_INT_WDOG_10                          10



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