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[src/trunk]: src/sys/arch Various updates and improvements to cpu start up on...



details:   https://anonhg.NetBSD.org/src/rev/54bdd2c99412
branches:  trunk
changeset: 969314:54bdd2c99412
user:      skrll <skrll%NetBSD.org@localhost>
date:      Sat Feb 15 08:16:10 2020 +0000

description:
Various updates and improvements to cpu start up on arm/aarch64

- start sharing more code around the AP startup messaging.
- call arm_cpu_topology_set early so that ci_core_id is available for
  drivers, e.g. bcm2835_intr.c
- both arm and aarch64 now have
  - a static cpu_info_store array
  - the same arm_cpu_{hatched,mbox}

diffstat:

 sys/arch/aarch64/aarch64/cpu.c                |   65 +-----------
 sys/arch/aarch64/aarch64/locore.S             |   42 ++++---
 sys/arch/aarch64/conf/files.aarch64           |    3 +-
 sys/arch/aarch64/include/cpu.h                |   22 +--
 sys/arch/aarch64/include/machdep.h            |    6 +-
 sys/arch/arm/acpi/cpu_acpi.c                  |    7 +-
 sys/arch/arm/altera/cycv_platform.c           |    6 +-
 sys/arch/arm/arm/arm_cpu_topology.c           |    6 +-
 sys/arch/arm/arm/arm_machdep.c                |   26 ++--
 sys/arch/arm/arm/armv6_start.S                |   71 ++++++++++--
 sys/arch/arm/arm/cpu_subr.c                   |  142 ++++++++++++++++++++++++++
 sys/arch/arm/arm32/arm32_boot.c               |   18 +--
 sys/arch/arm/arm32/arm32_machdep.c            |   27 +---
 sys/arch/arm/arm32/cpu.c                      |   40 ++----
 sys/arch/arm/arm32/genassym.cf                |    5 +-
 sys/arch/arm/broadcom/bcm2835_intr.c          |   14 +-
 sys/arch/arm/conf/files.arm                   |    3 +-
 sys/arch/arm/fdt/cpu_fdt.c                    |    5 +-
 sys/arch/arm/include/arm32/machdep.h          |    7 +-
 sys/arch/arm/include/cpu.h                    |   46 +++++---
 sys/arch/arm/include/cpu_topology.h           |   19 +-
 sys/arch/arm/include/cpuvar.h                 |   43 +++++++
 sys/arch/arm/include/locore.h                 |    6 +-
 sys/arch/arm/mainbus/cpu_mainbus.c            |   14 +-
 sys/arch/arm/nvidia/soc_tegra124.c            |   37 ++++--
 sys/arch/arm/samsung/exynos_platform.c        |    6 +-
 sys/arch/arm/vexpress/vexpress_platform.c     |   32 ++---
 sys/arch/evbarm/bcm53xx/bcm53xx_machdep.c     |    6 +-
 sys/arch/evbarm/beagle/beagle_machdep.c       |   35 +++---
 sys/arch/evbarm/gumstix/gumstix_machdep.c     |    4 +-
 sys/arch/evbarm/imx7/imx7_machdep.c           |   36 ++---
 sys/arch/evbarm/nitrogen6/nitrogen6_machdep.c |   41 +++----
 sys/arch/evbarm/zynq/zynq_machdep.c           |    6 +-
 33 files changed, 485 insertions(+), 361 deletions(-)

diffs (truncated from 1764 to 300 lines):

diff -r e84d8cdd119a -r 54bdd2c99412 sys/arch/aarch64/aarch64/cpu.c
--- a/sys/arch/aarch64/aarch64/cpu.c    Sat Feb 15 07:46:48 2020 +0000
+++ b/sys/arch/aarch64/aarch64/cpu.c    Sat Feb 15 08:16:10 2020 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: cpu.c,v 1.40 2020/02/09 08:14:55 skrll Exp $ */
+/* $NetBSD: cpu.c,v 1.41 2020/02/15 08:16:10 skrll Exp $ */
 
 /*
  * Copyright (c) 2017 Ryo Shimizu <ryo%nerv.org@localhost>
@@ -27,7 +27,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(1, "$NetBSD: cpu.c,v 1.40 2020/02/09 08:14:55 skrll Exp $");
+__KERNEL_RCSID(1, "$NetBSD: cpu.c,v 1.41 2020/02/15 08:16:10 skrll Exp $");
 
 #include "locators.h"
 #include "opt_arm_debug.h"
@@ -68,16 +68,6 @@
 static void cpu_setup_sysctl(device_t, struct cpu_info *);
 
 #ifdef MULTIPROCESSOR
-uint64_t cpu_mpidr[MAXCPUS];
-
-volatile u_int aarch64_cpu_mbox[howmany(MAXCPUS, sizeof(u_int))] __cacheline_aligned = { 0 };
-volatile u_int aarch64_cpu_hatched[howmany(MAXCPUS, sizeof(u_int))] __cacheline_aligned = { 0 };
-u_int arm_cpu_max = 1;
-
-static kmutex_t cpu_hatch_lock;
-#endif /* MULTIPROCESSOR */
-
-#ifdef MULTIPROCESSOR
 #define NCPUINFO       MAXCPUS
 #else
 #define NCPUINFO       1
@@ -94,10 +84,6 @@
        }
 };
 
-struct cpu_info *cpu_info[NCPUINFO] __read_mostly = {
-       [0] = &cpu_info_store[0]
-};
-
 void
 cpu_attach(device_t dv, cpuid_t id)
 {
@@ -498,38 +484,6 @@
 
 #ifdef MULTIPROCESSOR
 void
-cpu_boot_secondary_processors(void)
-{
-       u_int n, bit;
-
-       if ((boothowto & RB_MD1) != 0)
-               return;
-
-       mutex_init(&cpu_hatch_lock, MUTEX_DEFAULT, IPL_NONE);
-
-       VPRINTF("%s: starting secondary processors\n", __func__);
-
-       /* send mbox to have secondary processors do cpu_hatch() */
-       for (n = 0; n < __arraycount(aarch64_cpu_mbox); n++)
-               atomic_or_uint(&aarch64_cpu_mbox[n], aarch64_cpu_hatched[n]);
-       __asm __volatile ("sev; sev; sev");
-
-       /* wait all cpus have done cpu_hatch() */
-       for (n = 0; n < __arraycount(aarch64_cpu_mbox); n++) {
-               while (membar_consumer(), aarch64_cpu_mbox[n] & aarch64_cpu_hatched[n]) {
-                       __asm __volatile ("wfe");
-               }
-               /* Add processors to kcpuset */
-               for (bit = 0; bit < 32; bit++) {
-                       if (aarch64_cpu_hatched[n] & __BIT(bit))
-                               kcpuset_set(kcpuset_attached, n * 32 + bit);
-               }
-       }
-
-       VPRINTF("%s: secondary processors hatched\n", __func__);
-}
-
-void
 cpu_hatch(struct cpu_info *ci)
 {
        KASSERT(curcpu() == ci);
@@ -556,23 +510,12 @@
 #endif
 
        /*
-        * clear my bit of aarch64_cpu_mbox to tell cpu_boot_secondary_processors().
+        * clear my bit of arm_cpu_mbox to tell cpu_boot_secondary_processors().
         * there are cpu0,1,2,3, and if cpu2 is unresponsive,
         * ci_index are each cpu0=0, cpu1=1, cpu2=undef, cpu3=2.
         * therefore we have to use device_unit instead of ci_index for mbox.
         */
-       const u_int off = device_unit(ci->ci_dev) / 32;
-       const u_int bit = device_unit(ci->ci_dev) % 32;
-       atomic_and_uint(&aarch64_cpu_mbox[off], ~__BIT(bit));
-       __asm __volatile ("sev; sev; sev");
-}
 
-bool
-cpu_hatched_p(u_int cpuindex)
-{
-       const u_int off = cpuindex / 32;
-       const u_int bit = cpuindex % 32;
-       membar_consumer();
-       return (aarch64_cpu_hatched[off] & __BIT(bit)) != 0;
+       cpu_clr_mbox(device_unit(ci->ci_dev));
 }
 #endif /* MULTIPROCESSOR */
diff -r e84d8cdd119a -r 54bdd2c99412 sys/arch/aarch64/aarch64/locore.S
--- a/sys/arch/aarch64/aarch64/locore.S Sat Feb 15 07:46:48 2020 +0000
+++ b/sys/arch/aarch64/aarch64/locore.S Sat Feb 15 08:16:10 2020 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: locore.S,v 1.55 2020/02/09 08:09:58 skrll Exp $        */
+/*     $NetBSD: locore.S,v 1.56 2020/02/15 08:16:10 skrll Exp $        */
 
 /*
  * Copyright (c) 2017 Ryo Shimizu <ryo%nerv.org@localhost>
@@ -38,7 +38,7 @@
 #include <aarch64/hypervisor.h>
 #include "assym.h"
 
-RCSID("$NetBSD: locore.S,v 1.55 2020/02/09 08:09:58 skrll Exp $")
+RCSID("$NetBSD: locore.S,v 1.56 2020/02/15 08:16:10 skrll Exp $")
 
 #ifdef AARCH64_DEVICE_MEM_STRONGLY_ORDERED
 #define        MAIR_DEVICE_MEM         MAIR_DEVICE_nGnRnE
@@ -449,35 +449,41 @@
        mrs     x1, mpidr_el1
        str     x1, [x0, #CI_MPIDR]     /* curcpu()->ci_mpidr = mpidr_el1 */
 
-       mov     x0, #32
-       udiv    x1, x27, x0
-       adrl    x0, _C_LABEL(aarch64_cpu_hatched)
-       add     x28, x0, x1, lsl #2     /* x28 = &aarch64_cpu_hatched[cpuindex/32] */
+       /* set topology information */
+       mov     x2, #0
+       bl      arm_cpu_topology_set
+
+       /* x28 = &arm_cpu_hatched[cpuindex / (sizeof(u_long) * NBBY)] */
+       adrl    x0, _C_LABEL(arm_cpu_hatched)
+       mov     x1, x27, lsr #6
+       add     x28, x0, x1, lsl #3
+
+       /* x29 = __BIT(cpuindex % (sizeof(u_long) * NBBY)) */
        mov     x0, #1
-       mov     x2, #32
-       msub    x1, x1, x2, x27
-       lsl     x29, x0, x1             /* x29 = 1 << (cpuindex % 32) */
+       and     x2, x27, #63
+       lsl     x29, x0, x2
 
        /*
-        * atomic_or_uint(&aarch64_cpu_hatched[cpuindex/32], 1<<cpuindex%32)
-        * to tell my activity to primary processor.
+        * atomic_or_ulong(&arm_cpu_hatched[cpuindex / (sizeof(u_long)  * NBBY)],
+        *   _BIT(cpuindex % ((sizeof(u_long) * NBBY)
+        * to inform the boot processor.
         */
        mov     x0, x28
        mov     x1, x29
-       bl      _C_LABEL(atomic_or_uint)        /* hatched! */
+       bl      _C_LABEL(atomic_or_ulong)       /* hatched! */
        dsb     sy
        sev
 
-       mov     x0, #32
-       udiv    x1, x27, x0
-       adrl    x0, _C_LABEL(aarch64_cpu_mbox)
-       add     x28, x0, x1, lsl #2     /* x28 = &aarch64_cpu_mbox[cpuindex/32] */
+       /* x28 = &arm_cpu_mbox[cpuindex / (sizeof(u_long) * NBBY)] */
+       adrl    x0, _C_LABEL(arm_cpu_mbox)
+       mov     x1, x27, lsr #6
+       add     x28, x0, x1, lsl #3
 
        /* wait for the mailbox start bit to become true */
 1:
        dmb     sy
-       ldr     w20, [x28]
-       tst     w20, w29
+       ldr     x20, [x28]
+       tst     x20, x29
        bne     9f
        wfe
        b       1b
diff -r e84d8cdd119a -r 54bdd2c99412 sys/arch/aarch64/conf/files.aarch64
--- a/sys/arch/aarch64/conf/files.aarch64       Sat Feb 15 07:46:48 2020 +0000
+++ b/sys/arch/aarch64/conf/files.aarch64       Sat Feb 15 08:16:10 2020 +0000
@@ -1,4 +1,4 @@
-#      $NetBSD: files.aarch64,v 1.19 2020/02/03 13:37:01 ryo Exp $
+#      $NetBSD: files.aarch64,v 1.20 2020/02/15 08:16:10 skrll Exp $
 
 defflag opt_cpuoptions.h       AARCH64_ALIGNMENT_CHECK
 defflag opt_cpuoptions.h       AARCH64_EL0_STACK_ALIGNMENT_CHECK
@@ -86,6 +86,7 @@
 file   arch/arm/arm/arm_cpu_topology.c
 file   arch/arm/arm/arm_generic_dma.c
 file   arch/arm/arm/bootconfig.c
+file   arch/arm/arm/cpu_subr.c
 file   arch/arm/arm32/bus_dma.c
 file   arch/aarch64/aarch64/aarch64_machdep.c
 file   arch/aarch64/aarch64/aarch64_reboot.c
diff -r e84d8cdd119a -r 54bdd2c99412 sys/arch/aarch64/include/cpu.h
--- a/sys/arch/aarch64/include/cpu.h    Sat Feb 15 07:46:48 2020 +0000
+++ b/sys/arch/aarch64/include/cpu.h    Sat Feb 15 08:16:10 2020 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: cpu.h,v 1.20 2020/02/12 06:05:46 riastradh Exp $ */
+/* $NetBSD: cpu.h,v 1.21 2020/02/15 08:16:10 skrll Exp $ */
 
 /*-
  * Copyright (c) 2014 The NetBSD Foundation, Inc.
@@ -32,6 +32,8 @@
 #ifndef _AARCH64_CPU_H_
 #define _AARCH64_CPU_H_
 
+#include <arm/cpu.h>
+
 #ifdef __aarch64__
 
 #ifdef _KERNEL_OPT
@@ -104,7 +106,6 @@
        uint64_t ci_acpiid;     /* ACPI Processor Unique ID */
 
        struct aarch64_sysctl_cpu_id ci_id;
-#define arm_cpu_mpidr(ci)      ((ci)->ci_id.ac_mpidr)
 
        struct aarch64_cache_info *ci_cacheinfo;
        struct aarch64_cpufuncs ci_cpufuncs;
@@ -123,15 +124,12 @@
 #define setsoftast(ci)         atomic_or_uint(&(ci)->ci_astpending, __BIT(0))
 #define cpu_signotify(l)       setsoftast((l)->l_cpu)
 
-void cpu_proc_fork(struct proc *, struct proc *);
-void cpu_need_proftick(struct lwp *l);
-void cpu_boot_secondary_processors(void);
-void cpu_mpstart(void);
-void cpu_hatch(struct cpu_info *);
+void   cpu_need_proftick(struct lwp *l);
+
+void   cpu_hatch(struct cpu_info *);
 
 extern struct cpu_info *cpu_info[];
-extern uint64_t cpu_mpidr[];           /* MULTIPROCESSOR */
-bool cpu_hatched_p(u_int);             /* MULTIPROCESSOR */
+extern struct cpu_info cpu_info_store[];
 
 #define CPU_INFO_ITERATOR      cpuid_t
 #if defined(MULTIPROCESSOR) || defined(_MODULE)
@@ -161,14 +159,8 @@
 #endif
 }
 
-void   cpu_attach(device_t, cpuid_t);
-
 #endif /* _KERNEL || _KMEMUSER */
 
-#elif defined(__arm__)
-
-#include <arm/cpu.h>
-
 #endif
 
 #endif /* _AARCH64_CPU_H_ */
diff -r e84d8cdd119a -r 54bdd2c99412 sys/arch/aarch64/include/machdep.h
--- a/sys/arch/aarch64/include/machdep.h        Sat Feb 15 07:46:48 2020 +0000
+++ b/sys/arch/aarch64/include/machdep.h        Sat Feb 15 08:16:10 2020 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: machdep.h,v 1.9 2019/12/18 21:45:43 riastradh Exp $    */
+/*     $NetBSD: machdep.h,v 1.10 2020/02/15 08:16:10 skrll Exp $       */
 
 /*
  * Copyright (c) 2017 Ryo Shimizu <ryo%nerv.org@localhost>
@@ -66,10 +66,6 @@
 
 extern char *booted_kernel;
 
-#ifdef MULTIPROCESSOR
-extern u_int arm_cpu_max;
-#endif
-
 /*
  * note that we use void * as all the platforms have different ideas on what
  * the structure is
diff -r e84d8cdd119a -r 54bdd2c99412 sys/arch/arm/acpi/cpu_acpi.c
--- a/sys/arch/arm/acpi/cpu_acpi.c      Sat Feb 15 07:46:48 2020 +0000
+++ b/sys/arch/arm/acpi/cpu_acpi.c      Sat Feb 15 08:16:10 2020 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: cpu_acpi.c,v 1.7 2019/10/19 18:04:26 jmcneill Exp $ */
+/* $NetBSD: cpu_acpi.c,v 1.8 2020/02/15 08:16:10 skrll Exp $ */
 
 /*-
  * Copyright (c) 2018 The NetBSD Foundation, Inc.
@@ -33,7 +33,7 @@
 #include "opt_multiprocessor.h"
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: cpu_acpi.c,v 1.7 2019/10/19 18:04:26 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: cpu_acpi.c,v 1.8 2020/02/15 08:16:10 skrll Exp $");



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