Source-Changes-HG archive

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index][Old Index]

[src/trunk]: src/sys/arch Merge amd64func.S into cpufunc.S, and clean up.



details:   https://anonhg.NetBSD.org/src/rev/350d0670f774
branches:  trunk
changeset: 965235:350d0670f774
user:      maxv <maxv%NetBSD.org@localhost>
date:      Sat Sep 07 18:56:01 2019 +0000

description:
Merge amd64func.S into cpufunc.S, and clean up.

diffstat:

 sys/arch/amd64/amd64/amd64func.S   |   50 --------------
 sys/arch/amd64/amd64/cpufunc.S     |  126 +++++++++++++-----------------------
 sys/arch/amd64/conf/Makefile.amd64 |    4 +-
 sys/arch/amd64/conf/files.amd64    |    3 +-
 sys/arch/xen/conf/files.xen        |    3 +-
 5 files changed, 49 insertions(+), 137 deletions(-)

diffs (truncated from 313 to 300 lines):

diff -r 1c95b9a1688f -r 350d0670f774 sys/arch/amd64/amd64/amd64func.S
--- a/sys/arch/amd64/amd64/amd64func.S  Sat Sep 07 18:33:16 2019 +0000
+++ /dev/null   Thu Jan 01 00:00:00 1970 +0000
@@ -1,50 +0,0 @@
-/*     $NetBSD: amd64func.S,v 1.7 2013/06/22 02:33:44 uebayasi Exp $   */
-
-/*-
- * Copyright (c) 2008 The NetBSD Foundation, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
- * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
- * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-
-/*
- * Functions to provide access to amd64-specific instructions.
- *
- * These are explicitly _not_ shared with xen/amd64.
- */
-
-#include <machine/asm.h>
-
-#include "assym.h"
-
-ENTRY(tsc_get_timecount)
-       movq    CPUVAR(CURLWP), %rcx
-1:
-       movq    L_NCSW(%rcx), %rdi
-       rdtsc
-       addl    CPUVAR(CC_SKEW), %eax
-       cmpq    %rdi, L_NCSW(%rcx)
-       jne     2f
-       ret
-2:
-       jmp     1b
-END(tsc_get_timecount)
diff -r 1c95b9a1688f -r 350d0670f774 sys/arch/amd64/amd64/cpufunc.S
--- a/sys/arch/amd64/amd64/cpufunc.S    Sat Sep 07 18:33:16 2019 +0000
+++ b/sys/arch/amd64/amd64/cpufunc.S    Sat Sep 07 18:56:01 2019 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: cpufunc.S,v 1.44 2019/09/07 18:33:16 maxv Exp $        */
+/*     $NetBSD: cpufunc.S,v 1.45 2019/09/07 18:56:01 maxv Exp $        */
 
 /*
  * Copyright (c) 1998, 2007, 2008 The NetBSD Foundation, Inc.
@@ -29,10 +29,6 @@
  * POSSIBILITY OF SUCH DAMAGE.
  */
 
-/*
- * Functions to provide access to i386-specific instructions.
- */
-
 #include <sys/errno.h>
 
 #include <machine/asm.h>
@@ -81,6 +77,16 @@
        ret
 END(invlpg)
 
+ENTRY(lgdt)
+       /* Reload the descriptor table. */
+       movq    %rdi,%rax
+       lgdt    (%rax)
+       /* Flush the prefetch queue. */
+       jmp     1f
+       nop
+1:     jmp     _C_LABEL(lgdt_finish)
+END(lgdt)
+
 ENTRY(lidt)
        lidt    (%rdi)
        ret
@@ -100,27 +106,7 @@
        ltr     %di
        ret
 END(ltr)
-#endif
 
-/*
- * Big hammer: flush all TLB entries, including ones from PTE's
- * with the G bit set.  This should only be necessary if TLB
- * shootdown falls far behind.
- *
- * Intel Architecture Software Developer's Manual, Volume 3,
- *     System Programming, section 9.10, "Invalidating the
- * Translation Lookaside Buffers (TLBS)":
- * "The following operations invalidate all TLB entries, irrespective
- * of the setting of the G flag:
- * ...
- * "(P6 family processors only): Writing to control register CR4 to
- * modify the PSE, PGE, or PAE flag."
- *
- * (the alternatives not quoted above are not an option here.)
- *
- * If PGE is not in use, we reload CR3.
- */
-#ifndef XENPV
 ENTRY(tlbflushg)
        movq    %cr4, %rax
        testq   $CR4_PGE, %rax
@@ -150,6 +136,20 @@
        ret
 END(tlbflush)
 
+ENTRY(wbinvd)
+       wbinvd
+       ret
+END(wbinvd)
+
+ENTRY(setusergs)
+       CLI(ax)
+       swapgs
+       movw    %di, %gs
+       swapgs
+       STI(ax)
+       ret
+END(setusergs)
+
 ENTRY(x86_read_flags)
        pushfq
        popq    %rax
@@ -165,33 +165,38 @@
 END(x86_write_flags)
 
 STRONG_ALIAS(x86_write_psl,x86_write_flags)
-#endif /* XENPV */
 
-/*
- * Support for reading MSRs in the safe manner (returns EFAULT on fault)
- */
-/* int rdmsr_safe(u_int msr, uint64_t *data) */
+ENTRY(tsc_get_timecount)
+       movq    CPUVAR(CURLWP), %rcx
+1:
+       movq    L_NCSW(%rcx), %rdi
+       rdtsc
+       addl    CPUVAR(CC_SKEW), %eax
+       cmpq    %rdi, L_NCSW(%rcx)
+       jne     2f
+       ret
+2:
+       jmp     1b
+END(tsc_get_timecount)
+#endif /* !XENPV */
+
 ENTRY(rdmsr_safe)
        movq    CPUVAR(CURLWP), %r8
        movq    L_PCB(%r8), %r8
        movq    $_C_LABEL(msr_onfault), PCB_ONFAULT(%r8)
 
-       movl    %edi, %ecx /* u_int msr */
-       rdmsr                   /* Read MSR pointed by %ecx. Returns
-                                  hi byte in edx, lo in %eax */
-       salq    $32, %rdx       /* sign-shift %rdx left */
+       movl    %edi, %ecx
+       rdmsr
+       salq    $32, %rdx
        movl    %eax, %eax      /* zero-extend %eax -> %rax */
        orq     %rdx, %rax
-       movq    %rax, (%rsi)  /* *data */
-       xorq    %rax, %rax    /* "no error" */
+       movq    %rax, (%rsi)
 
+       xorq    %rax, %rax
        movq    %rax, PCB_ONFAULT(%r8)
        ret
 END(rdmsr_safe)
 
-/*
- * MSR operations fault handler
- */
 ENTRY(msr_onfault)
        movq    CPUVAR(CURLWP), %r8
        movq    L_PCB(%r8), %r8
@@ -200,13 +205,6 @@
        ret
 END(msr_onfault)
 
-#ifndef XENPV
-ENTRY(wbinvd)
-       wbinvd
-       ret
-END(wbinvd)
-#endif
-
 ENTRY(cpu_counter)
        xorq    %rax, %rax
        rdtsc
@@ -258,28 +256,7 @@
 END(__byte_swap_u16_variable)
 
 /*
- * void lgdt(struct region_descriptor *rdp);
- *
- * Load a new GDT pointer (and do any necessary cleanup).
- * XXX It's somewhat questionable whether reloading all the segment registers
- * is necessary, since the actual descriptor data is not changed except by
- * process creation and exit, both of which clean up via task switches.
- */
-#ifndef XENPV
-ENTRY(lgdt)
-       /* Reload the descriptor table. */
-       movq    %rdi,%rax
-       lgdt    (%rax)
-       /* Flush the prefetch q. */
-       jmp     1f
-       nop
-1:     jmp     _C_LABEL(lgdt_finish)
-END(lgdt)
-#endif
-
-/*
- * void lgdt_finish(void);
- * Reload segments after a GDT change
+ * Reload segments after a GDT change.
  */
 ENTRY(lgdt_finish)
        movl    $GSEL(GDATA_SEL, SEL_KPL),%eax
@@ -290,8 +267,6 @@
 END(lgdt_finish)
 
 /*
- * void x86_flush()
- *
  * Flush instruction pipelines by doing an intersegment (far) return.
  */
 ENTRY(x86_flush)
@@ -487,14 +462,3 @@
        outsl
        ret
 END(outsl)
-
-#ifndef XENPV
-ENTRY(setusergs)
-       CLI(ax)
-       swapgs
-       movw    %di, %gs
-       swapgs
-       STI(ax)
-       ret
-END(setusergs)
-#endif
diff -r 1c95b9a1688f -r 350d0670f774 sys/arch/amd64/conf/Makefile.amd64
--- a/sys/arch/amd64/conf/Makefile.amd64        Sat Sep 07 18:33:16 2019 +0000
+++ b/sys/arch/amd64/conf/Makefile.amd64        Sat Sep 07 18:56:01 2019 +0000
@@ -1,4 +1,4 @@
-#      $NetBSD: Makefile.amd64,v 1.77 2019/05/22 08:31:25 kamil Exp $
+#      $NetBSD: Makefile.amd64,v 1.78 2019/09/07 18:56:01 maxv Exp $
 
 # Makefile for NetBSD
 #
@@ -89,7 +89,7 @@
 # depend on CPU configuration
 locore.o machdep.o: Makefile
 
-acpi_wakeup_low.o amd64func.o busfunc.o cpufunc.o cpu_in_cksum.o: assym.h
+acpi_wakeup_low.o busfunc.o cpufunc.o cpu_in_cksum.o: assym.h
 linux_sigcode.o linux32_sigcode.o lock_stubs.o mptramp.o: assym.h
 netbsd32_sigcode.o: assym.h
 
diff -r 1c95b9a1688f -r 350d0670f774 sys/arch/amd64/conf/files.amd64
--- a/sys/arch/amd64/conf/files.amd64   Sat Sep 07 18:33:16 2019 +0000
+++ b/sys/arch/amd64/conf/files.amd64   Sat Sep 07 18:56:01 2019 +0000
@@ -1,4 +1,4 @@
-#      $NetBSD: files.amd64,v 1.112 2019/02/15 08:54:01 nonaka Exp $
+#      $NetBSD: files.amd64,v 1.113 2019/09/07 18:56:01 maxv Exp $
 #
 # new style config file for amd64 architecture
 #
@@ -36,7 +36,6 @@
 file   arch/amd64/amd64/copy.S                 machdep
 file   arch/amd64/amd64/spl.S                  machdep
 
-file   arch/amd64/amd64/amd64func.S            machdep
 file   arch/amd64/amd64/amd64_trap.S           machdep
 file   arch/amd64/amd64/autoconf.c             machdep
 file   arch/amd64/amd64/busfunc.S              machdep
diff -r 1c95b9a1688f -r 350d0670f774 sys/arch/xen/conf/files.xen
--- a/sys/arch/xen/conf/files.xen       Sat Sep 07 18:33:16 2019 +0000
+++ b/sys/arch/xen/conf/files.xen       Sat Sep 07 18:56:01 2019 +0000
@@ -1,4 +1,4 @@



Home | Main Index | Thread Index | Old Index