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[src-draft/trunk]: src/sys/dev/usb Remove added delays.
details: https://anonhg.NetBSD.org/src-all/rev/fefe8b4a41ab
branches: trunk
changeset: 948053:fefe8b4a41ab
user: Nathanial Sloss <nat%netbsd.org@localhost>
date: Fri Aug 14 03:14:50 2020 +1000
description:
Remove added delays.
diffstat:
sys/dev/usb/if_urtwn.c | 13 -------------
1 files changed, 0 insertions(+), 13 deletions(-)
diffs (91 lines):
diff -r 58decebf7624 -r fefe8b4a41ab sys/dev/usb/if_urtwn.c
--- a/sys/dev/usb/if_urtwn.c Fri Aug 14 02:27:56 2020 +1000
+++ b/sys/dev/usb/if_urtwn.c Fri Aug 14 03:14:50 2020 +1000
@@ -2411,7 +2411,6 @@
urtwn_read_1(sc, R92C_BCN_CTRL) &
~(R92C_BCN_CTRL_EN_BCN | R92C_BCN_CTRL_TXBCN_RPT));
}
- urtwn_delay_ms(sc, 1);
/* Reset EDCA parameters. */
urtwn_write_4(sc, R92C_EDCA_VO_PARAM, 0x002f3217);
@@ -2430,8 +2429,6 @@
break;
}
- urtwn_delay_ms(sc, 1);
-
switch (nstate) {
case IEEE80211_S_INIT:
/* Turn link LED off. */
@@ -2476,7 +2473,6 @@
R92C_BCN_CTRL_DIS_TSF_UDT0);
}
- urtwn_delay_ms(sc, 1);
/* Make link LED blink during scan. */
urtwn_set_led(sc, URTWN_LED_LINK, !sc->ledlink);
@@ -2502,13 +2498,11 @@
reg = RW(reg, R92C_OFDM0_AGCCORE1_GAIN, 0x32);
urtwn_bb_write(sc, R92C_OFDM0_AGCCORE1(0), reg);
- urtwn_delay_ms(sc, 1);
if (!ISSET(sc->chip, URTWN_CHIP_88E)) {
reg = urtwn_bb_read(sc, R92C_OFDM0_AGCCORE1(1));
reg = RW(reg, R92C_OFDM0_AGCCORE1_GAIN, 0x32);
urtwn_bb_write(sc, R92C_OFDM0_AGCCORE1(1), reg);
}
- urtwn_delay_ms(sc, 1);
/* Set media status to 'No Link'. */
urtwn_set_nettype0_msr(sc, R92C_CR_NETTYPE_NOLINK);
@@ -2566,7 +2560,6 @@
break;
}
- urtwn_delay_ms(sc, 1);
/* Set media status to 'Associated'. */
urtwn_set_nettype0_msr(sc, urtwn_get_nettype(sc));
@@ -2582,7 +2575,6 @@
} else /* IEEE_MODE_11NG */
urtwn_write_1(sc, R92C_INIRTS_RATE_SEL, 12); /* MCS 0 */
- urtwn_delay_ms(sc, 1);
/* Enable Rx of data frames. */
urtwn_write_2(sc, R92C_RXFLTMAP2, 0xffff);
@@ -5238,8 +5230,6 @@
chan -= 2;
}
- urtwn_delay_ms(sc, 1);
-
/* Set Tx power for this new channel. */
urtwn_set_txpower(sc, chan, ht40m);
@@ -5309,7 +5299,6 @@
urtwn_bb_read(sc, R92C_FPGA0_ANAPARAM2) |
R92C_FPGA0_ANAPARAM2_CBW20);
}
- urtwn_delay_ms(sc, 1);
/* Select 20MHz bandwidth. */
urtwn_rf_write(sc, 0, R92C_RF_CHNLBW,
@@ -5598,7 +5587,6 @@
urtwn_stop(ifp, 0);
- urtwn_delay_ms(sc, 2);
mutex_enter(&sc->sc_write_mtx);
mutex_enter(&sc->sc_task_mtx);
@@ -5857,7 +5845,6 @@
urtwn_wait_async(sc);
splx(s);
- urtwn_delay_ms(sc, 2);
sc->tx_timer = 0;
ifp->if_timer = 0;
ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
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