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[src/trunk]: src/sys/arch/aarch64/aarch64 Use the dmb/dsb/isb macros... if no...



details:   https://anonhg.NetBSD.org/src/rev/7ceec7338fc3
branches:  trunk
changeset: 945135:7ceec7338fc3
user:      skrll <skrll%NetBSD.org@localhost>
date:      Thu Oct 22 07:31:15 2020 +0000

description:
Use the dmb/dsb/isb macros... if nothing else they're all now consistent
about the "memory" assembler contraint.

No binary change

diffstat:

 sys/arch/aarch64/aarch64/aarch64_machdep.c |   6 +++---
 sys/arch/aarch64/aarch64/cpufunc.c         |  18 +++++++++---------
 sys/arch/aarch64/aarch64/db_machdep.c      |   8 ++++----
 sys/arch/aarch64/aarch64/efi_machdep.c     |   8 ++++----
 sys/arch/aarch64/aarch64/fpu.c             |  16 ++++++++--------
 sys/arch/aarch64/aarch64/pmap.c            |  12 +++++++-----
 sys/arch/aarch64/aarch64/trap.c            |  10 +++++-----
 7 files changed, 40 insertions(+), 38 deletions(-)

diffs (truncated from 331 to 300 lines):

diff -r c14f966f7936 -r 7ceec7338fc3 sys/arch/aarch64/aarch64/aarch64_machdep.c
--- a/sys/arch/aarch64/aarch64/aarch64_machdep.c        Thu Oct 22 07:23:24 2020 +0000
+++ b/sys/arch/aarch64/aarch64/aarch64_machdep.c        Thu Oct 22 07:31:15 2020 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: aarch64_machdep.c,v 1.52 2020/10/22 07:23:24 skrll Exp $ */
+/* $NetBSD: aarch64_machdep.c,v 1.53 2020/10/22 07:31:15 skrll Exp $ */
 
 /*-
  * Copyright (c) 2014 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(1, "$NetBSD: aarch64_machdep.c,v 1.52 2020/10/22 07:23:24 skrll Exp $");
+__KERNEL_RCSID(1, "$NetBSD: aarch64_machdep.c,v 1.53 2020/10/22 07:31:15 skrll Exp $");
 
 #include "opt_arm_debug.h"
 #include "opt_cpuoptions.h"
@@ -171,7 +171,7 @@
        /* Disable translation table walks using TTBR0 */
        uint64_t tcr = reg_tcr_el1_read();
        reg_tcr_el1_write(tcr | TCR_EPD0);
-       __asm __volatile("isb" ::: "memory");
+       isb();
 
        aarch64_tlbi_all();
 
diff -r c14f966f7936 -r 7ceec7338fc3 sys/arch/aarch64/aarch64/cpufunc.c
--- a/sys/arch/aarch64/aarch64/cpufunc.c        Thu Oct 22 07:23:24 2020 +0000
+++ b/sys/arch/aarch64/aarch64/cpufunc.c        Thu Oct 22 07:31:15 2020 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: cpufunc.c,v 1.25 2020/10/22 07:23:24 skrll Exp $       */
+/*     $NetBSD: cpufunc.c,v 1.26 2020/10/22 07:31:15 skrll Exp $       */
 
 /*
  * Copyright (c) 2017 Ryo Shimizu <ryo%nerv.org@localhost>
@@ -30,7 +30,7 @@
 #include "opt_multiprocessor.h"
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: cpufunc.c,v 1.25 2020/10/22 07:23:24 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: cpufunc.c,v 1.26 2020/10/22 07:31:15 skrll Exp $");
 
 #include <sys/param.h>
 #include <sys/types.h>
@@ -69,7 +69,7 @@
        /* select and extract level N data cache */
        reg_csselr_el1_write(__SHIFTIN(level, CSSELR_LEVEL) |
            __SHIFTIN(insn ? 1 : 0, CSSELR_IND));
-       __asm __volatile ("isb");
+       isb();
 
        ccsidr = reg_ccsidr_el1_read();
        mmfr2 = reg_id_aa64mmfr2_el1_read();
@@ -391,10 +391,10 @@
                if (cinfo[level].cacheable == CACHE_CACHEABLE_NONE)
                        break;
 
-               __asm __volatile ("dsb ish");
+               dsb(ish);
                ln_dcache_wbinv_all(level, &cinfo[level].dcache);
        }
-       __asm __volatile ("dsb ish");
+       dsb(ish);
 }
 
 void
@@ -409,10 +409,10 @@
                if (cinfo[level].cacheable == CACHE_CACHEABLE_NONE)
                        break;
 
-               __asm __volatile ("dsb ish");
+               dsb(ish);
                ln_dcache_inv_all(level, &cinfo[level].dcache);
        }
-       __asm __volatile ("dsb ish");
+       dsb(ish);
 }
 
 void
@@ -427,10 +427,10 @@
                if (cinfo[level].cacheable == CACHE_CACHEABLE_NONE)
                        break;
 
-               __asm __volatile ("dsb ish");
+               dsb(ish);
                ln_dcache_wb_all(level, &cinfo[level].dcache);
        }
-       __asm __volatile ("dsb ish");
+       dsb(ish);
 }
 
 int
diff -r c14f966f7936 -r 7ceec7338fc3 sys/arch/aarch64/aarch64/db_machdep.c
--- a/sys/arch/aarch64/aarch64/db_machdep.c     Thu Oct 22 07:23:24 2020 +0000
+++ b/sys/arch/aarch64/aarch64/db_machdep.c     Thu Oct 22 07:31:15 2020 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: db_machdep.c,v 1.27 2020/10/22 07:23:24 skrll Exp $ */
+/* $NetBSD: db_machdep.c,v 1.28 2020/10/22 07:31:15 skrll Exp $ */
 
 /*-
  * Copyright (c) 2014 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: db_machdep.c,v 1.27 2020/10/22 07:23:24 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: db_machdep.c,v 1.28 2020/10/22 07:31:15 skrll Exp $");
 
 #ifdef _KERNEL_OPT
 #include "opt_compat_netbsd32.h"
@@ -444,13 +444,13 @@
        }
 
        reg_s1e0r_write(addr);
-       __asm __volatile ("isb");
+       isb();
        par = reg_par_el1_read();
        db_printf("Stage1 EL0 translation %016llx -> PAR_EL1 = ", addr);
        db_par_print(par, addr);
 
        reg_s1e1r_write(addr);
-       __asm __volatile ("isb");
+       isb();
        par = reg_par_el1_read();
        db_printf("Stage1 EL1 translation %016llx -> PAR_EL1 = ", addr);
        db_par_print(par, addr);
diff -r c14f966f7936 -r 7ceec7338fc3 sys/arch/aarch64/aarch64/efi_machdep.c
--- a/sys/arch/aarch64/aarch64/efi_machdep.c    Thu Oct 22 07:23:24 2020 +0000
+++ b/sys/arch/aarch64/aarch64/efi_machdep.c    Thu Oct 22 07:31:15 2020 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: efi_machdep.c,v 1.7 2020/10/22 07:23:24 skrll Exp $ */
+/* $NetBSD: efi_machdep.c,v 1.8 2020/10/22 07:31:15 skrll Exp $ */
 
 /*-
  * Copyright (c) 2018 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: efi_machdep.c,v 1.7 2020/10/22 07:23:24 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: efi_machdep.c,v 1.8 2020/10/22 07:31:15 skrll Exp $");
 
 #include <sys/param.h>
 #include <uvm/uvm_extern.h>
@@ -91,7 +91,7 @@
 
        /* Enable FP access (AArch64 UEFI calling convention) */
        reg_cpacr_el1_write(CPACR_FPEN_ALL);
-       __asm __volatile ("isb");
+       isb();
 
        /*
         * Install custom fault handler. EFI lock is held across calls so
@@ -107,7 +107,7 @@
 
        /* Disable FP access */
        reg_cpacr_el1_write(CPACR_FPEN_NONE);
-       __asm __volatile ("isb");
+       isb();
 
        /* Restore FPU state */
        if (arm_efirt_state.fpu_used)
diff -r c14f966f7936 -r 7ceec7338fc3 sys/arch/aarch64/aarch64/fpu.c
--- a/sys/arch/aarch64/aarch64/fpu.c    Thu Oct 22 07:23:24 2020 +0000
+++ b/sys/arch/aarch64/aarch64/fpu.c    Thu Oct 22 07:31:15 2020 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: fpu.c,v 1.9 2020/10/22 07:23:24 skrll Exp $ */
+/* $NetBSD: fpu.c,v 1.10 2020/10/22 07:31:15 skrll Exp $ */
 
 /*-
  * Copyright (c) 2014 The NetBSD Foundation, Inc.
@@ -31,7 +31,7 @@
 
 #include <sys/cdefs.h>
 
-__KERNEL_RCSID(1, "$NetBSD: fpu.c,v 1.9 2020/10/22 07:23:24 skrll Exp $");
+__KERNEL_RCSID(1, "$NetBSD: fpu.c,v 1.10 2020/10/22 07:31:15 skrll Exp $");
 
 #include <sys/param.h>
 #include <sys/types.h>
@@ -146,7 +146,7 @@
        /* allow user process to use FP */
        l->l_md.md_cpacr = CPACR_FPEN_ALL;
        reg_cpacr_el1_write(CPACR_FPEN_ALL);
-       __asm __volatile ("isb");
+       isb();
 
        if ((flags & PCU_REENABLE) == 0)
                load_fpregs(&pcb->pcb_fpregs);
@@ -160,12 +160,12 @@
        curcpu()->ci_vfp_save.ev_count++;
 
        reg_cpacr_el1_write(CPACR_FPEN_EL1);    /* fpreg access enable */
-       __asm __volatile ("isb");
+       isb();
 
        save_fpregs(&pcb->pcb_fpregs);
 
        reg_cpacr_el1_write(CPACR_FPEN_NONE);   /* fpreg access disable */
-       __asm __volatile ("isb");
+       isb();
 }
 
 static void
@@ -176,7 +176,7 @@
        /* disallow user process to use FP */
        l->l_md.md_cpacr = CPACR_FPEN_NONE;
        reg_cpacr_el1_write(CPACR_FPEN_NONE);
-       __asm __volatile ("isb");
+       isb();
 }
 
 static const struct fpreg zero_fpreg;
@@ -224,7 +224,7 @@
         * executing any further instructions.
         */
        reg_cpacr_el1_write(CPACR_FPEN_ALL);
-       arm_isb();
+       isb();
 }
 
 void
@@ -255,7 +255,7 @@
         * it again.
         */
        reg_cpacr_el1_write(CPACR_FPEN_NONE);
-       arm_isb();
+       isb();
 
        s = ci->ci_kfpu_spl;
        ci->ci_kfpu_spl = -1;
diff -r c14f966f7936 -r 7ceec7338fc3 sys/arch/aarch64/aarch64/pmap.c
--- a/sys/arch/aarch64/aarch64/pmap.c   Thu Oct 22 07:23:24 2020 +0000
+++ b/sys/arch/aarch64/aarch64/pmap.c   Thu Oct 22 07:31:15 2020 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: pmap.c,v 1.91 2020/09/28 12:04:19 skrll Exp $  */
+/*     $NetBSD: pmap.c,v 1.92 2020/10/22 07:31:15 skrll Exp $  */
 
 /*
  * Copyright (c) 2017 Ryo Shimizu <ryo%nerv.org@localhost>
@@ -27,7 +27,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.91 2020/09/28 12:04:19 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.92 2020/10/22 07:31:15 skrll Exp $");
 
 #include "opt_arm_debug.h"
 #include "opt_ddb.h"
@@ -46,6 +46,8 @@
 #include <uvm/uvm.h>
 #include <uvm/pmap/pmap_pvt.h>
 
+#include <arm/cpufunc.h>
+
 #include <aarch64/pmap.h>
 #include <aarch64/pte.h>
 #include <aarch64/armreg.h>
@@ -793,7 +795,7 @@
                         */
                        register_t s = daif_disable(DAIF_I|DAIF_F);
                        reg_s1e1r_write(va);
-                       __asm __volatile ("isb");
+                       isb();
                        uint64_t par = reg_par_el1_read();
                        reg_daif_write(s);
 
@@ -1440,7 +1442,7 @@
        /* Disable translation table walks using TTBR0 */
        tcr = reg_tcr_el1_read();
        reg_tcr_el1_write(tcr | TCR_EPD0);
-       __asm __volatile("isb" ::: "memory");
+       isb();
 
        /* XXX: allocate asid, and regenerate if needed */
        if (pm->pm_asid == -1)
@@ -1452,7 +1454,7 @@
        /* Re-enable translation table walks using TTBR0 */
        tcr = reg_tcr_el1_read();
        reg_tcr_el1_write(tcr & ~TCR_EPD0);
-       __asm __volatile("isb" ::: "memory");
+       isb();
 
        pm->pm_activated = true;
 
diff -r c14f966f7936 -r 7ceec7338fc3 sys/arch/aarch64/aarch64/trap.c
--- a/sys/arch/aarch64/aarch64/trap.c   Thu Oct 22 07:23:24 2020 +0000
+++ b/sys/arch/aarch64/aarch64/trap.c   Thu Oct 22 07:31:15 2020 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: trap.c,v 1.39 2020/10/22 07:23:24 skrll Exp $ */
+/* $NetBSD: trap.c,v 1.40 2020/10/22 07:31:15 skrll Exp $ */
 
 /*-
  * Copyright (c) 2014 The NetBSD Foundation, Inc.
@@ -31,7 +31,7 @@
 
 #include <sys/cdefs.h>
 
-__KERNEL_RCSID(1, "$NetBSD: trap.c,v 1.39 2020/10/22 07:23:24 skrll Exp $");



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