Source-Changes-HG archive

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index][Old Index]

[src/trunk]: src/sys/arch/riscv/riscv Use correct instruction to load address...



details:   https://anonhg.NetBSD.org/src/rev/ca8bd78c2d5b
branches:  trunk
changeset: 945832:ca8bd78c2d5b
user:      skrll <skrll%NetBSD.org@localhost>
date:      Sun Nov 08 08:07:43 2020 +0000

description:
Use correct instruction to load address of exception_userexit into RA

diffstat:

 sys/arch/riscv/riscv/locore.S |  4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)

diffs (18 lines):

diff -r f83041ee7596 -r ca8bd78c2d5b sys/arch/riscv/riscv/locore.S
--- a/sys/arch/riscv/riscv/locore.S     Sun Nov 08 07:30:09 2020 +0000
+++ b/sys/arch/riscv/riscv/locore.S     Sun Nov 08 08:07:43 2020 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: locore.S,v 1.16 2020/11/04 20:05:47 skrll Exp $ */
+/* $NetBSD: locore.S,v 1.17 2020/11/08 08:07:43 skrll Exp $ */
 
 /*-
  * Copyright (c) 2014 The NetBSD Foundation, Inc.
@@ -440,7 +440,7 @@
        j       exception_kernexit
 
 trap_syscall:
-.L0:   PTR_L   ra, exception_userexit
+.L0:   PTR_LA  ra, exception_userexit
        PTR_L   t0, L_PROC(tp)          // get proc struct
        PTR_L   t0, P_MD_SYSCALL(t0)    // get syscall address from proc
        jr      t0                      // and jump to it



Home | Main Index | Thread Index | Old Index