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[src/trunk]: src/sys/arch/aarch64 Add options PMAPBOOT_DEBUG to dump TTBR whe...



details:   https://anonhg.NetBSD.org/src/rev/bf15d48926b5
branches:  trunk
changeset: 936049:bf15d48926b5
user:      ryo <ryo%NetBSD.org@localhost>
date:      Fri Jul 17 07:16:10 2020 +0000

description:
Add options PMAPBOOT_DEBUG to dump TTBR when pmapboot_enter().
Formerly DEBUG_MMU in locore.S, but there was a bit of confusion.

diffstat:

 sys/arch/aarch64/aarch64/locore.S   |  11 ++---
 sys/arch/aarch64/aarch64/pmapboot.c |  62 ++++++++++++++++++++----------------
 sys/arch/aarch64/conf/files.aarch64 |   3 +-
 3 files changed, 41 insertions(+), 35 deletions(-)

diffs (217 lines):

diff -r 0e964fc3b11a -r bf15d48926b5 sys/arch/aarch64/aarch64/locore.S
--- a/sys/arch/aarch64/aarch64/locore.S Fri Jul 17 06:42:56 2020 +0000
+++ b/sys/arch/aarch64/aarch64/locore.S Fri Jul 17 07:16:10 2020 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: locore.S,v 1.67 2020/07/16 11:36:35 skrll Exp $        */
+/*     $NetBSD: locore.S,v 1.68 2020/07/17 07:16:10 ryo Exp $  */
 
 /*
  * Copyright (c) 2017 Ryo Shimizu <ryo%nerv.org@localhost>
@@ -38,7 +38,7 @@
 #include <aarch64/hypervisor.h>
 #include "assym.h"
 
-RCSID("$NetBSD: locore.S,v 1.67 2020/07/16 11:36:35 skrll Exp $")
+RCSID("$NetBSD: locore.S,v 1.68 2020/07/17 07:16:10 ryo Exp $")
 
 #ifdef AARCH64_DEVICE_MEM_STRONGLY_ORDERED
 #define        MAIR_DEVICE_MEM         MAIR_DEVICE_nGnRnE
@@ -49,7 +49,6 @@
 
 /*#define DEBUG_LOCORE                 // debug print */
 /*#define DEBUG_LOCORE_PRINT_LOCK      // avoid mixing AP's output */
-/*#define DEBUG_MMU                    // dump MMU table */
 
 #define LOCORE_EL2
 
@@ -659,7 +658,7 @@
        ldp     x0, lr, [sp], #16
        ret
 
-#ifdef DEBUG_MMU
+#ifdef VERBOSE_LOCORE
 /*
  * tinyprintf() supports only maximum 7 '%x', '%d' and '%s' formats.
  * width and any modifiers are ignored. '\n' will be replaced to '\r\n'.
@@ -753,7 +752,7 @@
        ldp     x19, x20, [sp], #16
        ldp     x0, lr, [sp], #16
        ret
-#endif /* defined(DEBUG_LOCORE) || defined(DEBUG_MMU) */
+#endif /* VERBOSE_LOCORE */
 
 
 save_ttbrs:
@@ -788,7 +787,7 @@
        DPRINTSREG("TTBR0            = ", ttbr0_el1)
        DPRINTSREG("TTBR1            = ", ttbr1_el1)
 
-#ifdef DEBUG_MMU
+#ifdef VERBOSE_LOCORE
        adr     x26, tinyprintf
 #else
        mov     x26, xzr
diff -r 0e964fc3b11a -r bf15d48926b5 sys/arch/aarch64/aarch64/pmapboot.c
--- a/sys/arch/aarch64/aarch64/pmapboot.c       Fri Jul 17 06:42:56 2020 +0000
+++ b/sys/arch/aarch64/aarch64/pmapboot.c       Fri Jul 17 07:16:10 2020 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: pmapboot.c,v 1.8 2020/07/16 11:36:35 skrll Exp $       */
+/*     $NetBSD: pmapboot.c,v 1.9 2020/07/17 07:16:10 ryo Exp $ */
 
 /*
  * Copyright (c) 2018 Ryo Shimizu <ryo%nerv.org@localhost>
@@ -27,12 +27,13 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: pmapboot.c,v 1.8 2020/07/16 11:36:35 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pmapboot.c,v 1.9 2020/07/17 07:16:10 ryo Exp $");
 
 #include "opt_arm_debug.h"
 #include "opt_ddb.h"
 #include "opt_multiprocessor.h"
 #include "opt_pmap.h"
+#include "opt_pmapboot.h"
 
 #include <sys/param.h>
 #include <sys/types.h>
@@ -147,6 +148,13 @@
  */
 
 #ifdef VERBOSE_INIT_ARM
+#define VPRINTF(fmt, args...)  \
+       while (pr != NULL) { pr(fmt, ## args); break; }
+#else
+#define VPRINTF(fmt, args...)  __nothing
+#endif
+
+#ifdef PMAPBOOT_DEBUG
 static void
 pmapboot_pte_print(pt_entry_t pte, int level,
     void (*pr)(const char *, ...) __printflike(1, 2))
@@ -160,7 +168,15 @@
            l0pde_pa(pte));
 #endif
 }
-#endif /* VERBOSE_INIT_ARM */
+#define PMAPBOOT_DPRINTF(fmt, args...) \
+       while (pr != NULL) { pr(fmt, ## args); break; }
+#define PMAPBOOT_DPRINT_PTE(pte, l)    \
+       while (pr != NULL) { pmapboot_pte_print((pte), (l), pr); break; }
+#else /* PMAPBOOT_DEBUG */
+#define PMAPBOOT_DPRINTF(fmt, args...) __nothing
+#define PMAPBOOT_DPRINT_PTE(pte, l)    __nothing
+#endif /* PMAPBOOT_DEBUG */
+
 
 #ifdef OPTIMIZE_TLB_CONTIG
 static inline bool
@@ -178,17 +194,6 @@
 }
 #endif /* OPTIMIZE_TLB_CONTIG */
 
-
-#ifdef VERBOSE_INIT_ARM
-#define VPRINTF(fmt, args...)  \
-       while (pr != NULL) { pr(fmt, ## args); break; }
-#define VPRINT_PTE(pte, l)     \
-       while (pr != NULL) { pmapboot_pte_print((pte), (l), pr); break; }
-#else
-#define VPRINTF(fmt, args...)  __nothing
-#define VPRINT_PTE(pte, l)     __nothing
-#endif
-
 /*
  * pmapboot_enter() accesses pagetables by physical address.
  * this should be called while identity mapping (VA=PA) available.
@@ -265,8 +270,9 @@
 
                        pte = (uint64_t)l1 | L0_TABLE;
                        l0[idx0] = pte;
-                       VPRINTF("TTBR%d[%d] (new)\t= %016lx:", ttbr, idx0, pte);
-                       VPRINT_PTE(pte, 0);
+                       PMAPBOOT_DPRINTF("TTBR%d[%d] (new)\t= %016lx:",
+                           ttbr, idx0, pte);
+                       PMAPBOOT_DPRINT_PTE(pte, 0);
                } else {
                        l1 = (uint64_t *)(l0[idx0] & LX_TBL_PA);
                }
@@ -293,9 +299,9 @@
                        }
 
                        l1[idx1] = pte;
-                       VPRINTF("TTBR%d[%d][%d]\t= %016lx:", ttbr,
+                       PMAPBOOT_DPRINTF("TTBR%d[%d][%d]\t= %016lx:", ttbr,
                            idx0, idx1, pte);
-                       VPRINT_PTE(pte, 1);
+                       PMAPBOOT_DPRINT_PTE(pte, 1);
                        goto nextblk;
                }
 
@@ -308,9 +314,9 @@
 
                        pte = (uint64_t)l2 | L1_TABLE;
                        l1[idx1] = pte;
-                       VPRINTF("TTBR%d[%d][%d] (new)\t= %016lx:", ttbr,
-                           idx0, idx1, pte);
-                       VPRINT_PTE(pte, 1);
+                       PMAPBOOT_DPRINTF("TTBR%d[%d][%d] (new)\t= %016lx:",
+                           ttbr, idx0, idx1, pte);
+                       PMAPBOOT_DPRINT_PTE(pte, 1);
                } else {
                        l2 = (uint64_t *)(l1[idx1] & LX_TBL_PA);
                }
@@ -336,9 +342,9 @@
                        }
 
                        l2[idx2] = pte;
-                       VPRINTF("TTBR%d[%d][%d][%d]\t= %016lx:", ttbr,
+                       PMAPBOOT_DPRINTF("TTBR%d[%d][%d][%d]\t= %016lx:", ttbr,
                            idx0, idx1, idx2, pte);
-                       VPRINT_PTE(pte, 2);
+                       PMAPBOOT_DPRINT_PTE(pte, 2);
                        goto nextblk;
                }
 
@@ -351,9 +357,9 @@
 
                        pte = (uint64_t)l3 | L2_TABLE;
                        l2[idx2] = pte;
-                       VPRINTF("TTBR%d[%d][%d][%d] (new)\t= %016lx:", ttbr,
-                           idx0, idx1, idx2, pte);
-                       VPRINT_PTE(pte, 2);
+                       PMAPBOOT_DPRINTF("TTBR%d[%d][%d][%d] (new)\t= %016lx:",
+                           ttbr, idx0, idx1, idx2, pte);
+                       PMAPBOOT_DPRINT_PTE(pte, 2);
                } else {
                        l3 = (uint64_t *)(l2[idx2] & LX_TBL_PA);
                }
@@ -379,9 +385,9 @@
                }
 
                l3[idx3] = pte;
-               VPRINTF("TTBR%d[%d][%d][%d][%d]\t= %lx:", ttbr,
+               PMAPBOOT_DPRINTF("TTBR%d[%d][%d][%d][%d]\t= %lx:", ttbr,
                    idx0, idx1, idx2, idx3, pte);
-               VPRINT_PTE(pte, 3);
+               PMAPBOOT_DPRINT_PTE(pte, 3);
  nextblk:
 #ifdef OPTIMIZE_TLB_CONTIG
                /*
diff -r 0e964fc3b11a -r bf15d48926b5 sys/arch/aarch64/conf/files.aarch64
--- a/sys/arch/aarch64/conf/files.aarch64       Fri Jul 17 06:42:56 2020 +0000
+++ b/sys/arch/aarch64/conf/files.aarch64       Fri Jul 17 07:16:10 2020 +0000
@@ -1,4 +1,4 @@
-#      $NetBSD: files.aarch64,v 1.24 2020/06/29 23:56:30 riastradh Exp $
+#      $NetBSD: files.aarch64,v 1.25 2020/07/17 07:16:10 ryo Exp $
 
 defflag opt_cpuoptions.h       AARCH64_ALIGNMENT_CHECK
 defflag opt_cpuoptions.h       AARCH64_EL0_STACK_ALIGNMENT_CHECK
@@ -52,6 +52,7 @@
 defflag opt_pmap.h             PMAPHIST : KERNHIST
 defflag opt_pmap.h             PMAPCOUNTERS PMAP_STEAL_MEMORY
                                PMAP_NEED_ALLOC_POOLPAGE
+defflag opt_pmapboot.h         PMAPBOOT_DEBUG
 
 # MI support
 file   dev/cons.c



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