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[src/trunk]: src/sys/arch FDT support for Cavium OCTEON MIPS SoCs. WIP.
details: https://anonhg.NetBSD.org/src/rev/e6462a2f472c
branches: trunk
changeset: 936028:e6462a2f472c
user: jmcneill <jmcneill%NetBSD.org@localhost>
date: Thu Jul 16 11:49:37 2020 +0000
description:
FDT support for Cavium OCTEON MIPS SoCs. WIP.
diffstat:
sys/arch/evbmips/cavium/machdep.c | 14 ++-
sys/arch/evbmips/conf/OCTEON | 12 ++-
sys/arch/mips/cavium/dev/octeon_intc.c | 158 +++++++++++++++++++++++++++++++++
sys/arch/mips/cavium/dev/octeon_pip.c | 88 ++++++++++++++++-
sys/arch/mips/cavium/dev/octeon_smi.c | 105 +++++++++++++++++++--
sys/arch/mips/cavium/mainbus.c | 82 +++++++++++++++-
sys/arch/mips/conf/files.octeon | 21 +++-
sys/arch/mips/fdt/fdt_dma_machdep.c | 71 ++++++++++++++
8 files changed, 513 insertions(+), 38 deletions(-)
diffs (truncated from 803 to 300 lines):
diff -r bbd0b88f3e5b -r e6462a2f472c sys/arch/evbmips/cavium/machdep.c
--- a/sys/arch/evbmips/cavium/machdep.c Thu Jul 16 11:42:53 2020 +0000
+++ b/sys/arch/evbmips/cavium/machdep.c Thu Jul 16 11:49:37 2020 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: machdep.c,v 1.17 2020/07/13 05:20:45 simonb Exp $ */
+/* $NetBSD: machdep.c,v 1.18 2020/07/16 11:49:37 jmcneill Exp $ */
/*
* Copyright 2001, 2002 Wasabi Systems, Inc.
@@ -114,7 +114,7 @@
#include "opt_multiprocessor.h"
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.17 2020/07/13 05:20:45 simonb Exp $");
+__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.18 2020/07/16 11:49:37 jmcneill Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -153,6 +153,8 @@
#include <evbmips/cavium/octeon_uboot.h>
+#include <dev/fdt/fdtvar.h>
+
static void mach_init_vector(void);
static void mach_init_bus_space(void);
static void mach_init_console(void);
@@ -192,6 +194,7 @@
mach_init(uint64_t arg0, uint64_t arg1, uint64_t arg2, uint64_t arg3)
{
uint64_t btinfo_paddr;
+ void *fdt_data;
/* clear the BSS segment */
memset(edata, 0, end - edata);
@@ -219,6 +222,13 @@
cpu_setmodel("Cavium Octeon %s",
octeon_cpu_model(mips_options.mips_cpu_id));
+ if (octeon_btinfo.obt_minor_version >= 3 &&
+ octeon_btinfo.obt_fdt_addr != 0) {
+ fdt_data = (void *)MIPS_PHYS_TO_XKPHYS(CCA_CACHEABLE,
+ octeon_btinfo.obt_fdt_addr);
+ fdtbus_init(fdt_data);
+ }
+
mach_init_vector();
uvm_md_init();
diff -r bbd0b88f3e5b -r e6462a2f472c sys/arch/evbmips/conf/OCTEON
--- a/sys/arch/evbmips/conf/OCTEON Thu Jul 16 11:42:53 2020 +0000
+++ b/sys/arch/evbmips/conf/OCTEON Thu Jul 16 11:49:37 2020 +0000
@@ -1,14 +1,16 @@
-# $NetBSD: OCTEON,v 1.1 2020/07/15 12:15:30 simonb Exp $
+# $NetBSD: OCTEON,v 1.2 2020/07/16 11:49:37 jmcneill Exp $
include "arch/mips/conf/std.octeon"
include "arch/evbmips/conf/files.octeon"
#options INCLUDE_CONFIG_FILE # embed config file in kernel binary
-#ident "ERLITE-$Revision: 1.1 $"
+#ident "ERLITE-$Revision: 1.2 $"
maxusers 32
+options FDT
+
# Options for necessary to use MD
#options MEMORY_DISK_HOOKS
#options MEMORY_DISK_IS_ROOT # force root on memory disk
@@ -113,11 +115,17 @@
iobus0 at mainbus?
bootbus0 at mainbus?
+simplebus* at fdt? pass 0
+
+octintc* at fdt? pass 1
com* at iobus?
+com* at fdt?
octsmi* at iobus? # MDIO controller
+octsmi* at fdt? pass 2
octpip* at iobus? # PIP packet processing controller
+octpip* at fdt? pass 3
octgmx* at octpip?
cnmac* at octgmx?
diff -r bbd0b88f3e5b -r e6462a2f472c sys/arch/mips/cavium/dev/octeon_intc.c
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/sys/arch/mips/cavium/dev/octeon_intc.c Thu Jul 16 11:49:37 2020 +0000
@@ -0,0 +1,158 @@
+/* $NetBSD: octeon_intc.c,v 1.1 2020/07/16 11:49:37 jmcneill Exp $ */
+
+/*-
+ * Copyright (c) 2020 Jared D. McNeill <jmcneill%invisible.ca@localhost>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <sys/cdefs.h>
+__KERNEL_RCSID(0, "$NetBSD: octeon_intc.c,v 1.1 2020/07/16 11:49:37 jmcneill Exp $");
+
+#include <sys/param.h>
+#include <sys/bus.h>
+#include <sys/device.h>
+#include <sys/intr.h>
+#include <sys/systm.h>
+#include <sys/kernel.h>
+#include <sys/kmem.h>
+
+#include <dev/fdt/fdtvar.h>
+
+#include <arch/mips/cavium/octeonvar.h>
+
+static int octeon_intc_match(device_t, cfdata_t, void *);
+static void octeon_intc_attach(device_t, device_t, void *);
+
+static void * octeon_intc_establish(device_t, u_int *, int, int,
+ int (*)(void *), void *);
+static void octeon_intc_disestablish(device_t, void *);
+static bool octeon_intc_intrstr(device_t, u_int *, char *, size_t);
+
+struct fdtbus_interrupt_controller_func octeon_intc_funcs = {
+ .establish = octeon_intc_establish,
+ .disestablish = octeon_intc_disestablish,
+ .intrstr = octeon_intc_intrstr
+};
+
+enum octeon_intc_type {
+ OCTEON_INTC_CIU,
+};
+
+struct octeon_intc_softc {
+ device_t sc_dev;
+ int sc_phandle;
+ enum octeon_intc_type sc_type;
+ const char *sc_descr;
+};
+
+CFATTACH_DECL_NEW(octintc, sizeof(struct octeon_intc_softc),
+ octeon_intc_match, octeon_intc_attach, NULL, NULL);
+
+static const struct of_compat_data compat_data[] = {
+ { "cavium,octeon-3860-ciu", OCTEON_INTC_CIU },
+ { NULL }
+};
+
+static int
+octeon_intc_match(device_t parent, cfdata_t cf, void *aux)
+{
+ struct fdt_attach_args * const faa = aux;
+
+ return of_match_compat_data(faa->faa_phandle, compat_data);
+}
+
+static void
+octeon_intc_attach(device_t parent, device_t self, void *aux)
+{
+ struct octeon_intc_softc * const sc = device_private(self);
+ struct fdt_attach_args * const faa = aux;
+ const int phandle = faa->faa_phandle;
+ int error;
+
+ sc->sc_dev = self;
+ sc->sc_phandle = phandle;
+ sc->sc_type = of_search_compatible(phandle, compat_data)->data;
+
+ switch (sc->sc_type) {
+ case OCTEON_INTC_CIU:
+ sc->sc_descr = "CIU";
+ break;
+ }
+
+ error = fdtbus_register_interrupt_controller(self, phandle,
+ &octeon_intc_funcs);
+ if (error != 0) {
+ aprint_error(": couldn't register with fdtbus: %d\n", error);
+ return;
+ }
+
+ aprint_naive("\n");
+ aprint_normal(": %s\n", sc->sc_descr);
+}
+
+static void *
+octeon_intc_establish(device_t dev, u_int *specifier, int ipl, int flags,
+ int (*func)(void *), void *arg)
+{
+ struct octeon_intc_softc * const sc = device_private(dev);
+
+ /* 1st cell is the controller register (0 or 1) */
+ /* 2nd cell is the bit within the register (0..63) */
+
+ const u_int reg = be32toh(specifier[0]);
+ const u_int bit = be32toh(specifier[1]);
+ const u_int irq = (reg * 64) + bit;
+
+ if (irq >= NIRQS) {
+ aprint_error_dev(dev, "%s irq %d (%d, %d) out of range\n",
+ sc->sc_descr, irq, reg, bit);
+ return NULL;
+ }
+
+ return octeon_intr_establish(irq, ipl, func, arg);
+}
+
+static void
+octeon_intc_disestablish(device_t dev, void *ih)
+{
+ octeon_intr_disestablish(ih);
+}
+
+static bool
+octeon_intc_intrstr(device_t dev, u_int *specifier, char *buf,
+ size_t buflen)
+{
+ struct octeon_intc_softc * const sc = device_private(dev);
+
+ /* 1st cell is the controller register (0 or 1) */
+ /* 2nd cell is the bit within the register (0..63) */
+
+ const u_int reg = be32toh(specifier[0]);
+ const u_int bit = be32toh(specifier[1]);
+ const u_int irq = (reg * 64) + bit;
+
+ snprintf(buf, buflen, "%s irq %d", sc->sc_descr, irq);
+
+ return true;
+}
diff -r bbd0b88f3e5b -r e6462a2f472c sys/arch/mips/cavium/dev/octeon_pip.c
--- a/sys/arch/mips/cavium/dev/octeon_pip.c Thu Jul 16 11:42:53 2020 +0000
+++ b/sys/arch/mips/cavium/dev/octeon_pip.c Thu Jul 16 11:49:37 2020 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: octeon_pip.c,v 1.8 2020/06/23 05:18:02 simonb Exp $ */
+/* $NetBSD: octeon_pip.c,v 1.9 2020/07/16 11:49:37 jmcneill Exp $ */
/*
* Copyright (c) 2007 Internet Initiative Japan, Inc.
@@ -27,7 +27,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: octeon_pip.c,v 1.8 2020/06/23 05:18:02 simonb Exp $");
+__KERNEL_RCSID(0, "$NetBSD: octeon_pip.c,v 1.9 2020/07/16 11:49:37 jmcneill Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -44,14 +44,32 @@
#include <mips/cavium/dev/octeon_pipvar.h>
#include <mips/cavium/include/iobusvar.h>
-static int octpip_match(device_t, struct cfdata *, void *);
-static void octpip_attach(device_t, device_t, void *);
+#include <dev/fdt/fdtvar.h>
+
+static int octpip_iobus_match(device_t, struct cfdata *, void *);
+static void octpip_iobus_attach(device_t, device_t, void *);
+
+static int octpip_fdt_match(device_t, struct cfdata *, void *);
+static void octpip_fdt_attach(device_t, device_t, void *);
+
+CFATTACH_DECL_NEW(octpip_iobus, sizeof(struct octpip_softc),
+ octpip_iobus_match, octpip_iobus_attach, NULL, NULL);
-CFATTACH_DECL_NEW(octpip, sizeof(struct octpip_softc),
- octpip_match, octpip_attach, NULL, NULL);
+CFATTACH_DECL_NEW(octpip_fdt, sizeof(struct octpip_softc),
+ octpip_fdt_match, octpip_fdt_attach, NULL, NULL);
+
+static const char * compatible[] = {
+ "cavium,octeon-3860-pip",
+ NULL
+};
+
+static const char * pip_interface_compatible[] = {
+ "cavium,octeon-3860-pip-interface",
+ NULL
+};
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