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[src/trunk]: src/sys/arch/riscv Trailing whitespace
details: https://anonhg.NetBSD.org/src/rev/0e56f1d48a42
branches: trunk
changeset: 745859:0e56f1d48a42
user: skrll <skrll%NetBSD.org@localhost>
date: Sat Mar 14 16:12:15 2020 +0000
description:
Trailing whitespace
diffstat:
sys/arch/riscv/conf/Makefile.riscv | 4 ++--
sys/arch/riscv/conf/majors.riscv | 4 ++--
sys/arch/riscv/include/asm.h | 4 ++--
sys/arch/riscv/include/elf_machdep.h | 12 ++++++------
sys/arch/riscv/include/fenv.h | 4 ++--
sys/arch/riscv/include/frame.h | 4 ++--
sys/arch/riscv/include/ieeefp.h | 4 ++--
sys/arch/riscv/include/locore.h | 6 +++---
sys/arch/riscv/include/mcontext.h | 4 ++--
sys/arch/riscv/include/pte.h | 6 +++---
sys/arch/riscv/include/sysreg.h | 4 ++--
sys/arch/riscv/include/types.h | 6 +++---
sys/arch/riscv/riscv/db_machdep.c | 4 ++--
sys/arch/riscv/riscv/kobj_machdep.c | 4 ++--
sys/arch/riscv/riscv/locore.S | 8 ++++----
sys/arch/riscv/riscv/netbsd32_machdep.c | 6 +++---
sys/arch/riscv/riscv/pmap_machdep.c | 6 +++---
sys/arch/riscv/riscv/process_machdep.c | 4 ++--
sys/arch/riscv/riscv/procfs_machdep.c | 14 +++++++-------
sys/arch/riscv/riscv/riscv_machdep.c | 6 +++---
sys/arch/riscv/riscv/sig_machdep.c | 6 +++---
sys/arch/riscv/riscv/spl.S | 6 +++---
sys/arch/riscv/riscv/syscall.c | 10 +++++-----
sys/arch/riscv/riscv/trap.c | 8 ++++----
sys/arch/riscv/riscv/vm_machdep.c | 6 +++---
25 files changed, 75 insertions(+), 75 deletions(-)
diffs (truncated from 613 to 300 lines):
diff -r 81fa96d956ca -r 0e56f1d48a42 sys/arch/riscv/conf/Makefile.riscv
--- a/sys/arch/riscv/conf/Makefile.riscv Sat Mar 14 15:31:29 2020 +0000
+++ b/sys/arch/riscv/conf/Makefile.riscv Sat Mar 14 16:12:15 2020 +0000
@@ -1,4 +1,4 @@
-# $NetBSD: Makefile.riscv,v 1.5 2019/06/16 07:42:52 maxv Exp $
+# $NetBSD: Makefile.riscv,v 1.6 2020/03/14 16:12:15 skrll Exp $
# Makefile for NetBSD
#
@@ -99,7 +99,7 @@
.if defined(NEED_MDSETIMAGE) && ${NEED_MDSETIMAGE} != "no" \
&& defined(RAMDISKDIR) && exists(${RAMDISKDIR}/ramdisk.fs)
-SYSTEM_DEP+= ${RAMDISKDIR}/ramdisk.fs
+SYSTEM_DEP+= ${RAMDISKDIR}/ramdisk.fs
SYSTEM_LD_TAIL_EXTRA+=; \
echo ${TOOL_MDSETIMAGE} -s $@ ${RAMDISKDIR}/ramdisk.fs; \
${TOOL_MDSETIMAGE} -s $@ ${RAMDISKDIR}/ramdisk.fs
diff -r 81fa96d956ca -r 0e56f1d48a42 sys/arch/riscv/conf/majors.riscv
--- a/sys/arch/riscv/conf/majors.riscv Sat Mar 14 15:31:29 2020 +0000
+++ b/sys/arch/riscv/conf/majors.riscv Sat Mar 14 16:12:15 2020 +0000
@@ -1,4 +1,4 @@
-# $NetBSD: majors.riscv,v 1.7 2019/01/28 02:29:00 dholland Exp $
+# $NetBSD: majors.riscv,v 1.8 2020/03/14 16:12:15 skrll Exp $
#
# Device majors for riscv
#
@@ -32,7 +32,7 @@
#device-major aucom char 73 aucom
# Majors up to 143 are reserved for machine-dependent drivers.
-# New machine-independent driver majors are assigned in
+# New machine-independent driver majors are assigned in
# sys/conf/majors.
include "conf/majors.ws"
diff -r 81fa96d956ca -r 0e56f1d48a42 sys/arch/riscv/include/asm.h
--- a/sys/arch/riscv/include/asm.h Sat Mar 14 15:31:29 2020 +0000
+++ b/sys/arch/riscv/include/asm.h Sat Mar 14 16:12:15 2020 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: asm.h,v 1.3 2019/04/13 12:41:36 maya Exp $ */
+/* $NetBSD: asm.h,v 1.4 2020/03/14 16:12:16 skrll Exp $ */
/*-
* Copyright (c) 2014 The NetBSD Foundation, Inc.
@@ -49,7 +49,7 @@
REG_L ra, CALLFRAME_RA(sp); \
REG_L a0, CALLFRAME_S0(sp); \
addi sp, sp, CALLFRAME_SIZ; \
- .set pop;
+ .set pop;
#ifdef GPROF
#define _PROF_PROLOGUE _KERN_MCOUNT
diff -r 81fa96d956ca -r 0e56f1d48a42 sys/arch/riscv/include/elf_machdep.h
--- a/sys/arch/riscv/include/elf_machdep.h Sat Mar 14 15:31:29 2020 +0000
+++ b/sys/arch/riscv/include/elf_machdep.h Sat Mar 14 16:12:15 2020 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: elf_machdep.h,v 1.7 2019/06/01 12:42:28 maxv Exp $ */
+/* $NetBSD: elf_machdep.h,v 1.8 2020/03/14 16:12:16 skrll Exp $ */
/*-
* Copyright (c) 2014 The NetBSD Foundation, Inc.
@@ -117,13 +117,13 @@
#ifdef _KERNEL
#ifdef ELFSIZE
#define ELF_MD_PROBE_FUNC ELFNAME2(cpu_netbsd,probe)
-#endif
-
+#endif
+
struct exec_package;
-
+
int cpu_netbsd_elf32_probe(struct lwp *, struct exec_package *, void *, char *,
- vaddr_t *);
-
+ vaddr_t *);
+
int cpu_netbsd_elf64_probe(struct lwp *, struct exec_package *, void *, char *,
vaddr_t *);
diff -r 81fa96d956ca -r 0e56f1d48a42 sys/arch/riscv/include/fenv.h
--- a/sys/arch/riscv/include/fenv.h Sat Mar 14 15:31:29 2020 +0000
+++ b/sys/arch/riscv/include/fenv.h Sat Mar 14 16:12:15 2020 +0000
@@ -1,6 +1,6 @@
-/* $NetBSD: fenv.h,v 1.2 2017/03/22 23:11:09 chs Exp $ */
+/* $NetBSD: fenv.h,v 1.3 2020/03/14 16:12:16 skrll Exp $ */
-/*
+/*
* Based on ieeefp.h written by J.T. Conklin, Apr 28, 1995
* Public domain.
*/
diff -r 81fa96d956ca -r 0e56f1d48a42 sys/arch/riscv/include/frame.h
--- a/sys/arch/riscv/include/frame.h Sat Mar 14 15:31:29 2020 +0000
+++ b/sys/arch/riscv/include/frame.h Sat Mar 14 16:12:15 2020 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: frame.h,v 1.1 2014/09/19 17:36:26 matt Exp $ */
+/* $NetBSD: frame.h,v 1.2 2020/03/14 16:12:16 skrll Exp $ */
/*-
* Copyright (c) 2014 The NetBSD Foundation, Inc.
@@ -36,7 +36,7 @@
struct trapframe {
struct reg tf_regs __aligned(8);
- register_t tf_badvaddr;
+ register_t tf_badvaddr;
register_t tf_pc;
uint32_t tf_cause; // 32-bit register
uint32_t tf_sr; // 32-bit register
diff -r 81fa96d956ca -r 0e56f1d48a42 sys/arch/riscv/include/ieeefp.h
--- a/sys/arch/riscv/include/ieeefp.h Sat Mar 14 15:31:29 2020 +0000
+++ b/sys/arch/riscv/include/ieeefp.h Sat Mar 14 16:12:15 2020 +0000
@@ -1,6 +1,6 @@
-/* $NetBSD: ieeefp.h,v 1.1 2014/09/19 17:36:26 matt Exp $ */
+/* $NetBSD: ieeefp.h,v 1.2 2020/03/14 16:12:16 skrll Exp $ */
-/*
+/*
* Based on ieeefp.h written by J.T. Conklin, Apr 28, 1995
* Public domain.
*/
diff -r 81fa96d956ca -r 0e56f1d48a42 sys/arch/riscv/include/locore.h
--- a/sys/arch/riscv/include/locore.h Sat Mar 14 15:31:29 2020 +0000
+++ b/sys/arch/riscv/include/locore.h Sat Mar 14 16:12:15 2020 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: locore.h,v 1.4 2019/04/11 11:23:51 kamil Exp $ */
+/* $NetBSD: locore.h,v 1.5 2020/03/14 16:12:16 skrll Exp $ */
/*-
* Copyright (c) 2014 The NetBSD Foundation, Inc.
* All rights reserved.
@@ -39,7 +39,7 @@
struct trapframe {
struct reg tf_regs;
- register_t tf_badaddr;
+ register_t tf_badaddr;
uint32_t tf_cause; // 32-bit register
uint32_t tf_sr; // 32-bit register
#define tf_reg tf_regs.r_reg
@@ -80,7 +80,7 @@
// For COMPAT_NETBSD32 coredumps
struct trapframe32 {
struct reg32 tf_regs;
- register32_t tf_badaddr;
+ register32_t tf_badaddr;
uint32_t tf_cause; // 32-bit register
uint32_t tf_sr; // 32-bit register
};
diff -r 81fa96d956ca -r 0e56f1d48a42 sys/arch/riscv/include/mcontext.h
--- a/sys/arch/riscv/include/mcontext.h Sat Mar 14 15:31:29 2020 +0000
+++ b/sys/arch/riscv/include/mcontext.h Sat Mar 14 16:12:15 2020 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: mcontext.h,v 1.5 2018/02/15 15:53:56 kamil Exp $ */
+/* $NetBSD: mcontext.h,v 1.6 2020/03/14 16:12:16 skrll Exp $ */
/*-
* Copyright (c) 2014 The NetBSD Foundation, Inc.
@@ -38,7 +38,7 @@
#define _NFREG 33 /* F0-31, FCSR */
/*
- * This fragment is common to <riscv/mcontext.h> and <riscv/reg.h>
+ * This fragment is common to <riscv/mcontext.h> and <riscv/reg.h>
*/
#ifndef _BSD_FPREG_T_
union __fpreg {
diff -r 81fa96d956ca -r 0e56f1d48a42 sys/arch/riscv/include/pte.h
--- a/sys/arch/riscv/include/pte.h Sat Mar 14 15:31:29 2020 +0000
+++ b/sys/arch/riscv/include/pte.h Sat Mar 14 16:12:15 2020 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: pte.h,v 1.3 2019/06/16 07:42:52 maxv Exp $ */
+/* $NetBSD: pte.h,v 1.4 2020/03/14 16:12:16 skrll Exp $ */
/*
* Copyright (c) 2014, 2019 The NetBSD Foundation, Inc.
@@ -125,8 +125,8 @@
{
return pte | PTE_WIRED;
}
-
-static inline pt_entry_t
+
+static inline pt_entry_t
pte_unwire_entry(pt_entry_t pte)
{
return pte & ~PTE_WIRED;
diff -r 81fa96d956ca -r 0e56f1d48a42 sys/arch/riscv/include/sysreg.h
--- a/sys/arch/riscv/include/sysreg.h Sat Mar 14 15:31:29 2020 +0000
+++ b/sys/arch/riscv/include/sysreg.h Sat Mar 14 16:12:15 2020 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: sysreg.h,v 1.4 2019/06/16 07:42:52 maxv Exp $ */
+/* $NetBSD: sysreg.h,v 1.5 2020/03/14 16:12:16 skrll Exp $ */
/*
* Copyright (c) 2014 The NetBSD Foundation, Inc.
@@ -179,7 +179,7 @@
uint32_t __hi0, __hi1, __lo0;
do {
__asm __volatile(
- "csrr\t%[__hi0], cycleh"
+ "csrr\t%[__hi0], cycleh"
"\n\t" "csrr\t%[__lo0], cycle"
"\n\t" "csrr\t%[__hi1], cycleh"
: [__hi0] "=r"(__hi0),
diff -r 81fa96d956ca -r 0e56f1d48a42 sys/arch/riscv/include/types.h
--- a/sys/arch/riscv/include/types.h Sat Mar 14 15:31:29 2020 +0000
+++ b/sys/arch/riscv/include/types.h Sat Mar 14 16:12:15 2020 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: types.h,v 1.7 2018/07/12 10:46:46 maxv Exp $ */
+/* $NetBSD: types.h,v 1.8 2020/03/14 16:12:16 skrll Exp $ */
/*-
* Copyright (c) 2014 The NetBSD Foundation, Inc.
@@ -70,9 +70,9 @@
__uint32_t lb_sr;
} label_t;
#endif
-
+
typedef unsigned int __cpu_simple_lock_nv_t;
-#ifdef _LP64
+#ifdef _LP64
typedef __int64_t __register_t;
#else
typedef __int32_t __register_t;
diff -r 81fa96d956ca -r 0e56f1d48a42 sys/arch/riscv/riscv/db_machdep.c
--- a/sys/arch/riscv/riscv/db_machdep.c Sat Mar 14 15:31:29 2020 +0000
+++ b/sys/arch/riscv/riscv/db_machdep.c Sat Mar 14 16:12:15 2020 +0000
@@ -29,7 +29,7 @@
#include <sys/cdefs.h>
-__RCSID("$NetBSD: db_machdep.c,v 1.3 2019/06/16 07:42:52 maxv Exp $");
+__RCSID("$NetBSD: db_machdep.c,v 1.4 2020/03/14 16:12:16 skrll Exp $");
#include <sys/param.h>
@@ -89,7 +89,7 @@
{
struct trapframe * const tf = curcpu()->ci_ddb_regs;
KASSERT(db_regs <= vp && vp < db_regs + __arraycount(db_regs));
- const uintptr_t addr = (uintptr_t)tf + (uintptr_t)vp->valuep;
+ const uintptr_t addr = (uintptr_t)tf + (uintptr_t)vp->valuep;
if (vp->modif != NULL && vp->modif[0] == 'i') {
if (rw == DB_VAR_GET) {
*valp = *(const uint32_t *)addr;
diff -r 81fa96d956ca -r 0e56f1d48a42 sys/arch/riscv/riscv/kobj_machdep.c
--- a/sys/arch/riscv/riscv/kobj_machdep.c Sat Mar 14 15:31:29 2020 +0000
+++ b/sys/arch/riscv/riscv/kobj_machdep.c Sat Mar 14 16:12:15 2020 +0000
@@ -29,7 +29,7 @@
#include <sys/cdefs.h>
-__RCSID("$NetBSD: kobj_machdep.c,v 1.2 2017/11/03 09:59:08 maxv Exp $");
+__RCSID("$NetBSD: kobj_machdep.c,v 1.3 2020/03/14 16:12:16 skrll Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -133,7 +133,7 @@
*wwhere = ((addend & 0xfff) << 20) | (*wwhere & 0xfffff);
break;
case R_RISCV_PCREL_LO12_S:
- addend +=
+ addend +=
__SHIFTIN(__SHIFTOUT(addend, __BITS(31,25)), __BITS(11,5))
| __SHIFTIN(__SHIFTOUT(addend, __BITS(11,7)), __BITS(4,0));
/* FALLTHROUGH */
diff -r 81fa96d956ca -r 0e56f1d48a42 sys/arch/riscv/riscv/locore.S
--- a/sys/arch/riscv/riscv/locore.S Sat Mar 14 15:31:29 2020 +0000
+++ b/sys/arch/riscv/riscv/locore.S Sat Mar 14 16:12:15 2020 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: locore.S,v 1.11 2020/01/08 20:59:19 skrll Exp $ */
+/* $NetBSD: locore.S,v 1.12 2020/03/14 16:12:16 skrll Exp $ */
/*-
* Copyright (c) 2014 The NetBSD Foundation, Inc.
* All rights reserved.
@@ -37,7 +37,7 @@
ENTRY_NP(start)
// We get loaded and starting running at or near 0, not where we
// should be. We need to construct an initial PDETAB
-
+
#ifdef _LP64
li t0, SR_U64|SR_S64
li t1, SR_IM|SR_VM|SR_EI
@@ -182,7 +182,7 @@
REG_S s11, TF_S11(sp) // save callee saved address
csrr t4, sstatus // get status for intr state
REG_S t4, TF_SR(sp) // save it
-
+
REG_S sp, L_MD_KTF(a0) // record trapframe pointer
csrrci t0, sstatus, SR_EI // # disable interrupts
@@ -364,7 +364,7 @@
REG_S t5, TF_T5(sp) // save t5
REG_S t6, TF_T6(sp) // save t6
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