[src/trunk]: src/sys/arch/vax/include Some defines for the 6000/400 CPU.

[ragge <ragge%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/0d5e682ed50a
branches:  trunk
changeset: 494468:0d5e682ed50a
user:      ragge <ragge%NetBSD.org@localhost>
date:      Thu Jul 06 17:42:49 2000 +0000

description:
Some defines for the 6000/400 CPU.

diffstat:

 sys/arch/vax/include/ka670.h |  20 ++++++++++++++++----
 sys/arch/vax/include/mtpr.h  |  11 ++++++++++-
 2 files changed, 26 insertions(+), 5 deletions(-)

diffs (63 lines):

diff -r 4c650eefedcd -r 0d5e682ed50a sys/arch/vax/include/ka670.h
--- a/sys/arch/vax/include/ka670.h      Thu Jul 06 17:41:37 2000 +0000
+++ b/sys/arch/vax/include/ka670.h      Thu Jul 06 17:42:49 2000 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: ka670.h,v 1.1 1999/06/06 14:23:46 ragge Exp $  */
+/*     $NetBSD: ka670.h,v 1.2 2000/07/06 17:42:49 ragge Exp $  */
 /*
  * Copyright (c) 1999 Ludd, University of Lule}, Sweden.
  * All rights reserved.
@@ -15,8 +15,8 @@
  *    documentation and/or other materials provided with the distribution.
  * 3. All advertising materials mentioning features or use of this software
  *    must display the following acknowledgement:
- *      This product includes software developed at Ludd, University of 
- *      Lule}, Sweden and its contributors.
+ *     This product includes software developed at Ludd, University of 
+ *     Lule}, Sweden and its contributors.
  * 4. The name of the author may not be used to endorse or promote products
  *    derived from this software without specific prior written permission
  *
@@ -86,4 +86,16 @@
  */
 #define KA670_ACCS_VECTOR      (1<<0)  /* Vector Unit Present */
 #define KA670_ACCS_FCHIP               (1<<1)  /* FPU chip present */
-#define KA670_ACCS_WEP         (1<<31) /* Write Even Parity */
+#define KA670_ACCS_WEP         (1<<31) /* Write Even Parity */
+
+/*
+ * CPU-specific definitions for VAX 6000/400 (Calypso/XRP).
+ */
+
+/* Rigel SSC definitions */
+#define RSSC_ADDR      0x20140000      /* Phys address */
+#define RSSC_CONFIG    0x10            /* Offset */
+#define RSSC_BUSCTRL   0x20            /* Offset */
+#define RSSC_OPORT     0x30            /* Offset */
+#define RSSC_IPORT     0x40            /* Offset */
+
diff -r 4c650eefedcd -r 0d5e682ed50a sys/arch/vax/include/mtpr.h
--- a/sys/arch/vax/include/mtpr.h       Thu Jul 06 17:41:37 2000 +0000
+++ b/sys/arch/vax/include/mtpr.h       Thu Jul 06 17:42:49 2000 +0000
@@ -1,4 +1,4 @@
-/*      $NetBSD: mtpr.h,v 1.12 1999/06/06 19:06:29 ragge Exp $     */
+/*      $NetBSD: mtpr.h,v 1.13 2000/07/06 17:42:49 ragge Exp $     */
 
 /*
  * Copyright (c) 1994 Ludd, University of Lule}, Sweden.
@@ -151,6 +151,15 @@
 #define PR_PCERR  126 /* primary cache error address (KA43/KA46) */
 #define PR_PCSTS  127 /* primary cache status (KA43/KA46) */
 
+#define PR_VPSR   144 /* Vector processor status register */
+#define PR_VAER   145 /* Vector arithmetic error register */
+#define PR_VMAC   146 /* Vector memory activity register */
+#define PR_VTBIA  147 /* Vector TBIA */
+#define PR_VSAR   148 /* Vector state address register */
+#define PR_VIADR  157 /* Vector indirect address register */
+#define PR_VIDLO  158 /* Vector indirect data low */
+#define PR_VIDHI  159 /* Vector indirect data high */
+
 /* Definitions for AST */
 #define        AST_NO    4
 #define        AST_OK    3