[src/trunk]: src/sys/dev/pci Add register definitions for 5704 internal ASIC ...

[jonathan <jonathan%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/9d04cae2db09
branches:  trunk
changeset: 541697:9d04cae2db09
user:      jonathan <jonathan%NetBSD.org@localhost>
date:      Fri Jan 17 00:21:37 2003 +0000

description:
Add register definitions for 5704 internal ASIC revision.
Add cpp definitions for the DMA control register fields needed for
5703/5704 configuration on PCI-X.
Add softc copy of internal"local control" register clobbered by reset.

diffstat:

 sys/dev/pci/if_bgereg.h |  8 +++++++-
 1 files changed, 7 insertions(+), 1 deletions(-)

diffs (34 lines):

diff -r 411f4e4120d0 -r 9d04cae2db09 sys/dev/pci/if_bgereg.h
--- a/sys/dev/pci/if_bgereg.h   Fri Jan 17 00:19:16 2003 +0000
+++ b/sys/dev/pci/if_bgereg.h   Fri Jan 17 00:21:37 2003 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: if_bgereg.h,v 1.4 2002/07/13 22:31:18 thorpej Exp $    */
+/*     $NetBSD: if_bgereg.h,v 1.5 2003/01/17 00:21:37 jonathan Exp $   */
 /*
  * Copyright (c) 2001 Wind River Systems
  * Copyright (c) 1997, 1998, 1999, 2001
@@ -233,6 +233,7 @@
 #define BGE_ASICREV_BCM5703_A0         0x10000000
 #define BGE_ASICREV_BCM5703_A1         0x10010000
 #define BGE_ASICREV_BCM5703_A2         0x10020000
+#define BGE_ASICREV_BCM5704_A0         0x20000000
 
 /* PCI DMA Read/Write Control register */
 #define BGE_PCIDMARWCTL_MINDMA         0x000000FF
@@ -240,11 +241,16 @@
 #define BGE_PCIDMARWCTL_WRADDR_BNDRY   0x00003800
 #define BGE_PCIDMARWCTL_ONEDMA_ATONCE  0x00004000
 #define BGE_PCIDMARWCTL_RD_WAT         0x00070000
+# define BGE_PCIDMARWCTL_RD_WAT_SHIFT  16
 #define BGE_PCIDMARWCTL_WR_WAT         0x00380000
+# define BGE_PCIDMARWCTL_WR_WAT_SHIFT  19
 #define BGE_PCIDMARWCTL_USE_MRM                0x00400000
 #define BGE_PCIDMARWCTL_ASRT_ALL_BE    0x00800000
 #define BGE_PCIDMARWCTL_DFLT_PCI_RD_CMD        0x0F000000
+# define  BGE_PCIDMA_RWCTL_PCI_RD_CMD_SHIFT     24
 #define BGE_PCIDMARWCTL_DFLT_PCI_WR_CMD        0xF0000000
+# define  BGE_PCIDMA_RWCTL_PCI_WR_CMD_SHIFT     28
+
 
 #define BGE_PCI_READ_BNDRY_DISABLE     0x00000000
 #define BGE_PCI_READ_BNDRY_16BYTES     0x00000100