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[src/trunk]: src/sys/dev/ic Add note about time-of-day and interval timer pro...
details: https://anonhg.NetBSD.org/src/rev/edf8abe7fe5f
branches: trunk
changeset: 499103:edf8abe7fe5f
user: pk <pk%NetBSD.org@localhost>
date: Sat Nov 11 11:18:07 2000 +0000
description:
Add note about time-of-day and interval timer programming on this chip
are combined into the same (write-only!) control register.
diffstat:
sys/dev/ic/intersil7170.h | 11 +++++++++--
1 files changed, 9 insertions(+), 2 deletions(-)
diffs (32 lines):
diff -r b334503a584b -r edf8abe7fe5f sys/dev/ic/intersil7170.h
--- a/sys/dev/ic/intersil7170.h Sat Nov 11 11:03:31 2000 +0000
+++ b/sys/dev/ic/intersil7170.h Sat Nov 11 11:18:07 2000 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: intersil7170.h,v 1.3 2000/11/03 05:23:07 tsutsui Exp $ */
+/* $NetBSD: intersil7170.h,v 1.4 2000/11/11 11:18:07 pk Exp $ */
/*-
* Copyright (c) 1996 The NetBSD Foundation, Inc.
@@ -45,6 +45,13 @@
*
* Derived from: datasheet "ICM7170 a uP-Compatible Real-Time Clock"
* document #301680-005, Dec 85
+ *
+ * Note that this device provides both time-of-day and interval timer
+ * functionality. Both functions use the same control registers. On top
+ * of that, the command control register is write-only. Currently, this
+ * driver assumes that the interval timer is to be enabled, and hence
+ * always sets/restores the INTERSIL_CMD_IENABLE control bit when
+ * manipulating the TOD.
*/
struct intersil_dt { /* from p. 7 of 10 */
@@ -96,7 +103,7 @@
#define INTERSIL_CMD_TEST_MODE 0x20
#define INTERSIL_CMD_NORMAL_MODE 0x0
-/* bit assignments for interrupt register r/w, p 7 of 10*/
+/* bit assignments for interrupt register r/w, p 7 of 10 */
#define INTERSIL_INTER_ALARM 0x1 /* r/w */
#define INTERSIL_INTER_CSECONDS 0x2 /* r/w */
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