[src/trunk]: src/sys/arch/arm/sunxi Set pixel clock on mode set

[jmcneill <jmcneill%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/ad01f816c01c
branches:  trunk
changeset: 461341:ad01f816c01c
user:      jmcneill <jmcneill%NetBSD.org@localhost>
date:      Sat Nov 23 18:55:08 2019 +0000

description:
Set pixel clock on mode set

diffstat:

 sys/arch/arm/sunxi/sunxi_dwhdmi.c |  27 +++++++++++++++++++--------
 1 files changed, 19 insertions(+), 8 deletions(-)

diffs (76 lines):

diff -r ad65ca100e79 -r ad01f816c01c sys/arch/arm/sunxi/sunxi_dwhdmi.c
--- a/sys/arch/arm/sunxi/sunxi_dwhdmi.c Sat Nov 23 18:54:26 2019 +0000
+++ b/sys/arch/arm/sunxi/sunxi_dwhdmi.c Sat Nov 23 18:55:08 2019 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: sunxi_dwhdmi.c,v 1.6 2019/11/23 12:30:45 jmcneill Exp $ */
+/* $NetBSD: sunxi_dwhdmi.c,v 1.7 2019/11/23 18:55:08 jmcneill Exp $ */
 
 /*-
  * Copyright (c) 2019 Jared D. McNeill <jmcneill%invisible.ca@localhost>
@@ -27,7 +27,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: sunxi_dwhdmi.c,v 1.6 2019/11/23 12:30:45 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: sunxi_dwhdmi.c,v 1.7 2019/11/23 18:55:08 jmcneill Exp $");
 
 #include <sys/param.h>
 #include <sys/bus.h>
@@ -62,6 +62,7 @@
        int                     sc_phandle;
        struct fdtbus_phy       *sc_phy;
        struct fdtbus_regulator *sc_regulator;
+       struct clk              *sc_clk;
 
        struct fdt_device_ports sc_ports;
        struct drm_display_mode sc_curmode;
@@ -186,6 +187,15 @@
     struct drm_display_mode *adjusted_mode)
 {
        struct sunxi_dwhdmi_softc * const sc = to_sunxi_dwhdmi_softc(dsc);
+       int error;
+
+       if (sc->sc_clk != NULL) {
+               error = clk_set_rate(sc->sc_clk, adjusted_mode->clock * 1000);
+               if (error != 0)
+                       device_printf(sc->sc_base.sc_dev,
+                           "couldn't set pixel clock to %u Hz: %d\n",
+                           adjusted_mode->clock * 1000, error);
+       }
 
        sc->sc_curmode = *adjusted_mode;
 }
@@ -229,12 +239,6 @@
                return;
        }
 
-       rst = fdtbus_reset_get(phandle, "ctrl");
-       if (rst == NULL || fdtbus_reset_deassert(rst) != 0) {
-               aprint_error(": couldn't de-assert reset\n");
-               return;
-       }
-
        clk_iahb = fdtbus_clock_get(phandle, "iahb");
        if (clk_iahb == NULL || clk_enable(clk_iahb) != 0) {
                aprint_error(": couldn't enable iahb clock\n");
@@ -267,6 +271,7 @@
        sc->sc_base.sc_scl_hcnt = 0xd8;
        sc->sc_base.sc_scl_lcnt = 0xfe;
        sc->sc_phandle = faa->faa_phandle;
+       sc->sc_clk = clk_tmds;
 
        aprint_naive("\n");
        aprint_normal(": HDMI TX\n");
@@ -281,6 +286,12 @@
                return;
        }
 
+       rst = fdtbus_reset_get(phandle, "ctrl");
+       if (rst == NULL || fdtbus_reset_deassert(rst) != 0) {
+               aprint_error_dev(self, "couldn't de-assert reset\n");
+               return;
+       }
+
        sunxi_hdmiphy_init(sc->sc_phy);
 
        if (dwhdmi_attach(&sc->sc_base) != 0) {