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[src/netbsd-8]: src/sys/dev/pci Pull up the following revisions (via patch), ...



details:   https://anonhg.NetBSD.org/src/rev/fc2e628f2b7b
branches:  netbsd-8
changeset: 452619:fc2e628f2b7b
user:      martin <martin%NetBSD.org@localhost>
date:      Wed Jul 17 16:12:17 2019 +0000

description:
Pull up the following revisions (via patch), requested by msaitoh in
ticket #1298:

        sys/dev/pci/if_wm.c                             1.633, 1.637-1.641
        sys/dev/pci/if_wmreg.h                          1.114

- Use unsigned to avoid undefined behavior.
- Print ICH/PCH's NVM version.
- Fix typo in comment. u_int*_t -> uint*_t. Whitespace fix.

diffstat:

 sys/dev/pci/if_wm.c    |  347 ++++++++++++++++++++++++------------------------
 sys/dev/pci/if_wmreg.h |   14 +-
 2 files changed, 178 insertions(+), 183 deletions(-)

diffs (truncated from 1162 to 300 lines):

diff -r 7770f10fd6b7 -r fc2e628f2b7b sys/dev/pci/if_wm.c
--- a/sys/dev/pci/if_wm.c       Wed Jul 17 16:08:10 2019 +0000
+++ b/sys/dev/pci/if_wm.c       Wed Jul 17 16:12:17 2019 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: if_wm.c,v 1.508.4.32 2019/05/14 11:40:41 martin Exp $  */
+/*     $NetBSD: if_wm.c,v 1.508.4.33 2019/07/17 16:12:17 martin Exp $  */
 
 /*
  * Copyright (c) 2001, 2002, 2003, 2004 Wasabi Systems, Inc.
@@ -82,7 +82,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: if_wm.c,v 1.508.4.32 2019/05/14 11:40:41 martin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: if_wm.c,v 1.508.4.33 2019/07/17 16:12:17 martin Exp $");
 
 #ifdef _KERNEL_OPT
 #include "opt_net_mpsafe.h"
@@ -389,7 +389,7 @@
        WM_Q_EVCNT_DEFINE(txq, tusum6)      /* TCP/UDP v6 cksums comp. */
        WM_Q_EVCNT_DEFINE(txq, tso)         /* TCP seg offload (IPv4) */
        WM_Q_EVCNT_DEFINE(txq, tso6)        /* TCP seg offload (IPv6) */
-       WM_Q_EVCNT_DEFINE(txq, tsopain)     /* Painful header manip. for TSO */
+       WM_Q_EVCNT_DEFINE(txq, tsopain)     /* Painful header manip. for TSO */
        WM_Q_EVCNT_DEFINE(txq, pcqdrop)     /* Pkt dropped in pcq */
        WM_Q_EVCNT_DEFINE(txq, descdrop)    /* Pkt dropped in MAC desc ring */
                                            /* other than toomanyseg */
@@ -543,10 +543,10 @@
 
        int sc_nqueues;
        struct wm_queue *sc_queue;
-       u_int sc_tx_process_limit;      /* Tx processing repeat limit in softint */
-       u_int sc_tx_intr_process_limit; /* Tx processing repeat limit in H/W intr */
-       u_int sc_rx_process_limit;      /* Rx processing repeat limit in softint */
-       u_int sc_rx_intr_process_limit; /* Rx processing repeat limit in H/W intr */
+       u_int sc_tx_process_limit;      /* Tx proc. repeat limit in softint */
+       u_int sc_tx_intr_process_limit; /* Tx proc. repeat limit in H/W intr */
+       u_int sc_rx_process_limit;      /* Rx proc. repeat limit in softint */
+       u_int sc_rx_intr_process_limit; /* Rx proc. repeat limit in H/W intr */
 
        int sc_affinity_offset;
 
@@ -600,9 +600,12 @@
        struct wm_nvmop nvm;
 };
 
-#define WM_CORE_LOCK(_sc)      if ((_sc)->sc_core_lock) mutex_enter((_sc)->sc_core_lock)
-#define WM_CORE_UNLOCK(_sc)    if ((_sc)->sc_core_lock) mutex_exit((_sc)->sc_core_lock)
-#define WM_CORE_LOCKED(_sc)    (!(_sc)->sc_core_lock || mutex_owned((_sc)->sc_core_lock))
+#define WM_CORE_LOCK(_sc)                                              \
+       if ((_sc)->sc_core_lock) mutex_enter((_sc)->sc_core_lock)
+#define WM_CORE_UNLOCK(_sc)                                            \
+       if ((_sc)->sc_core_lock) mutex_exit((_sc)->sc_core_lock)
+#define WM_CORE_LOCKED(_sc)                                            \
+       (!(_sc)->sc_core_lock || mutex_owned((_sc)->sc_core_lock))
 
 #define        WM_RXCHAIN_RESET(rxq)                                           \
 do {                                                                   \
@@ -638,7 +641,7 @@
 #define        CSR_WRITE(sc, reg, val)                                         \
        bus_space_write_4((sc)->sc_st, (sc)->sc_sh, (reg), (val))
 #define        CSR_WRITE_FLUSH(sc)                                             \
-       (void) CSR_READ((sc), WMREG_STATUS)
+       (void)CSR_READ((sc), WMREG_STATUS)
 
 #define ICH8_FLASH_READ32(sc, reg)                                     \
        bus_space_read_4((sc)->sc_flasht, (sc)->sc_flashh,              \
@@ -1813,7 +1816,7 @@
        /*
         * Disable MSI for Errata:
         * "Message Signaled Interrupt Feature May Corrupt Write Transactions"
-        * 
+        *
         *  82544: Errata 25
         *  82540: Errata  6 (easy to reproduce device timeout)
         *  82545: Errata  4 (easy to reproduce device timeout)
@@ -1913,7 +1916,7 @@
                preg &= ~PCI_COMMAND_INVALIDATE_ENABLE;
        pci_conf_write(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, preg);
 
-       /* power up chip */
+       /* Power up chip */
        if ((error = pci_activate(pa->pa_pc, pa->pa_tag, self, NULL))
            && error != EOPNOTSUPP) {
                aprint_error_dev(sc->sc_dev, "cannot activate %d\n", error);
@@ -1973,7 +1976,7 @@
                        goto alloc_retry;
                }
        } else if (pci_intr_type(pc, sc->sc_intrs[0]) == PCI_INTR_TYPE_MSI) {
-               wm_adjust_qnum(sc, 0);  /* must not use multiqueue */
+               wm_adjust_qnum(sc, 0);  /* Must not use multiqueue */
                error = wm_setup_legacy(sc);
                if (error) {
                        pci_intr_release(sc->sc_pc, sc->sc_intrs,
@@ -1985,7 +1988,7 @@
                        goto alloc_retry;
                }
        } else {
-               wm_adjust_qnum(sc, 0);  /* must not use multiqueue */
+               wm_adjust_qnum(sc, 0);  /* Must not use multiqueue */
                error = wm_setup_legacy(sc);
                if (error) {
                        pci_intr_release(sc->sc_pc, sc->sc_intrs,
@@ -2246,8 +2249,8 @@
                }
                sc->phy.acquire = wm_get_phy_82575;
                sc->phy.release = wm_put_phy_82575;
-               sc->nvm.acquire = wm_get_nvm_80003;     
-               sc->nvm.release = wm_put_nvm_80003;     
+               sc->nvm.acquire = wm_get_nvm_80003;
+               sc->nvm.release = wm_put_nvm_80003;
                break;
        case WM_T_ICH8:
        case WM_T_ICH9:
@@ -2293,7 +2296,7 @@
                    * NVM_SIZE_MULTIPLIER;
                /* It is size in bytes, we want words */
                sc->sc_nvm_wordsize /= 2;
-               /* assume 2 banks */
+               /* Assume 2 banks */
                sc->sc_ich8_flash_bank_size = sc->sc_nvm_wordsize / 2;
                sc->sc_flashreg_offset = WM_PCH_SPT_FLASHOFFSET;
                sc->phy.acquire = wm_get_swflag_ich8lan;
@@ -2572,7 +2575,7 @@
                        sc->sc_flags &= ~WM_F_WOL;
                break;
        case PCI_PRODUCT_INTEL_82546GB_QUAD_COPPER_KSP3:
-               /* if quad port adapter, disable WoL on all but port A */
+               /* If quad port adapter, disable WoL on all but port A */
                if (sc->sc_funcid != 0)
                        sc->sc_flags &= ~WM_F_WOL;
                break;
@@ -2585,7 +2588,7 @@
        case PCI_PRODUCT_INTEL_82571EB_QUAD_COPPER:
        case PCI_PRODUCT_INTEL_82571EB_QUAD_FIBER:
        case PCI_PRODUCT_INTEL_82571GB_QUAD_COPPER:
-               /* if quad port adapter, disable WoL on all but port A */
+               /* If quad port adapter, disable WoL on all but port A */
                if (sc->sc_funcid != 0)
                        sc->sc_flags &= ~WM_F_WOL;
                break;
@@ -3110,11 +3113,9 @@
                wm_watchdog_txq(ifp, txq, &hang_queue);
        }
 
-       /*
-        * IF any of queues hanged up, reset the interface.
-        */
+       /* IF any of queues hanged up, reset the interface. */
        if (hang_queue != 0) {
-               (void) wm_init(ifp);
+               (void)wm_init(ifp);
 
                /*
                 * There are still some upper layer processing which call
@@ -3132,9 +3133,9 @@
 
        mutex_enter(txq->txq_lock);
        if (txq->txq_sending &&
-           time_uptime - txq->txq_lastsent > wm_watchdog_timeout) {
+           time_uptime - txq->txq_lastsent > wm_watchdog_timeout)
                wm_watchdog_txq_locked(ifp, txq, hang);
-       }
+
        mutex_exit(txq->txq_lock);
 }
 
@@ -3172,28 +3173,28 @@
 #ifdef WM_DEBUG
                for (i = txq->txq_sdirty; i != txq->txq_snext;
                    i = WM_NEXTTXS(txq, i)) {
-                   txs = &txq->txq_soft[i];
-                   printf("txs %d tx %d -> %d\n",
-                       i, txs->txs_firstdesc, txs->txs_lastdesc);
-                   for (j = txs->txs_firstdesc; ; j = WM_NEXTTX(txq, j)) {
-                           if ((sc->sc_flags & WM_F_NEWQUEUE) != 0) {
-                                   printf("\tdesc %d: 0x%" PRIx64 "\n", j,
-                                       txq->txq_nq_descs[j].nqtx_data.nqtxd_addr);
-                                   printf("\t %#08x%08x\n",
-                                       txq->txq_nq_descs[j].nqtx_data.nqtxd_fields,
-                                       txq->txq_nq_descs[j].nqtx_data.nqtxd_cmdlen);
-                           } else {
-                                   printf("\tdesc %d: 0x%" PRIx64 "\n", j,
-                                       (uint64_t)txq->txq_descs[j].wtx_addr.wa_high << 32 |
-                                       txq->txq_descs[j].wtx_addr.wa_low);
-                                   printf("\t %#04x%02x%02x%08x\n",
-                                       txq->txq_descs[j].wtx_fields.wtxu_vlan,
-                                       txq->txq_descs[j].wtx_fields.wtxu_options,
-                                       txq->txq_descs[j].wtx_fields.wtxu_status,
-                                       txq->txq_descs[j].wtx_cmdlen);
-                           }
-                       if (j == txs->txs_lastdesc)
-                               break;
+                       txs = &txq->txq_soft[i];
+                       printf("txs %d tx %d -> %d\n",
+                           i, txs->txs_firstdesc, txs->txs_lastdesc);
+                       for (j = txs->txs_firstdesc; ; j = WM_NEXTTX(txq, j)) {
+                               if ((sc->sc_flags & WM_F_NEWQUEUE) != 0) {
+                                       printf("\tdesc %d: 0x%" PRIx64 "\n", j,
+                                           txq->txq_nq_descs[j].nqtx_data.nqtxd_addr);
+                                       printf("\t %#08x%08x\n",
+                                           txq->txq_nq_descs[j].nqtx_data.nqtxd_fields,
+                                           txq->txq_nq_descs[j].nqtx_data.nqtxd_cmdlen);
+                               } else {
+                                       printf("\tdesc %d: 0x%" PRIx64 "\n", j,
+                                           (uint64_t)txq->txq_descs[j].wtx_addr.wa_high << 32 |
+                                           txq->txq_descs[j].wtx_addr.wa_low);
+                                       printf("\t %#04x%02x%02x%08x\n",
+                                           txq->txq_descs[j].wtx_fields.wtxu_vlan,
+                                           txq->txq_descs[j].wtx_fields.wtxu_options,
+                                           txq->txq_descs[j].wtx_fields.wtxu_status,
+                                           txq->txq_descs[j].wtx_cmdlen);
+                               }
+                               if (j == txs->txs_lastdesc)
+                                       break;
                        }
                }
 #endif
@@ -3308,7 +3309,7 @@
 wm_ioctl(struct ifnet *ifp, u_long cmd, void *data)
 {
        struct wm_softc *sc = ifp->if_softc;
-       struct ifreq *ifr = (struct ifreq *) data;
+       struct ifreq *ifr = (struct ifreq *)data;
        struct ifaddr *ifa = (struct ifaddr *)data;
        struct sockaddr_dl *sdl;
        int s, error;
@@ -3349,7 +3350,7 @@
                        sdl = satosdl(ifp->if_dl->ifa_addr);
                        (void)sockaddr_dl_setaddr(sdl, sdl->sdl_len,
                            LLADDR(satosdl(ifa->ifa_addr)), ifp->if_addrlen);
-                       /* unicast address is first multicast entry */
+                       /* Unicast address is the first multicast entry */
                        wm_set_filter(sc);
                        error = 0;
                        WM_CORE_UNLOCK(sc);
@@ -3496,9 +3497,9 @@
        int rv;
 
        if (enaddr != NULL) {
-               ral_lo = enaddr[0] | (enaddr[1] << 8) | (enaddr[2] << 16) |
-                   (enaddr[3] << 24);
-               ral_hi = enaddr[4] | (enaddr[5] << 8);
+               ral_lo = (uint32_t)enaddr[0] | ((uint32_t)enaddr[1] << 8) |
+                   ((uint32_t)enaddr[2] << 16) | ((uint32_t)enaddr[3] << 24);
+               ral_hi = (uint32_t)enaddr[4] | ((uint32_t)enaddr[5] << 8);
                ral_hi |= RAL_AV;
        } else {
                ral_lo = 0;
@@ -3535,7 +3536,7 @@
                        addrl = WMREG_PCH_LPT_SHRAL(idx - 1);
                        addrh = WMREG_PCH_LPT_SHRAH(idx - 1);
                }
-               
+
                if ((wlock_mac == 0) || (idx <= wlock_mac)) {
                        rv = wm_get_swflag_ich8lan(sc);
                        if (rv != 0)
@@ -3577,11 +3578,11 @@
            || (sc->sc_type == WM_T_PCH2) || (sc->sc_type == WM_T_PCH_LPT)
            || (sc->sc_type == WM_T_PCH_SPT) || (sc->sc_type == WM_T_PCH_CNP)){
                hash = (enaddr[4] >> ich8_lo_shift[sc->sc_mchash_type]) |
-                   (((uint16_t) enaddr[5]) << ich8_hi_shift[sc->sc_mchash_type]);
+                   (((uint16_t)enaddr[5]) << ich8_hi_shift[sc->sc_mchash_type]);
                return (hash & 0x3ff);
        }
        hash = (enaddr[4] >> lo_shift[sc->sc_mchash_type]) |
-           (((uint16_t) enaddr[5]) << hi_shift[sc->sc_mchash_type]);
+           (((uint16_t)enaddr[5]) << hi_shift[sc->sc_mchash_type]);
 
        return (hash & 0xfff);
 }
@@ -3626,7 +3627,7 @@
                size = WM_RAL_TABSIZE_I350;
                break;
        default:
-               size = WM_RAL_TABSIZE;    
+               size = WM_RAL_TABSIZE;
        }
 
        return size;
@@ -3685,7 +3686,7 @@
                        ralmax = 1;
                        break;
                default:
-                       /* available SHRA + RAR[0] */
+                       /* Available SHRA + RAR[0] */
                        ralmax = i + 1;
                }
        } else
@@ -4024,7 +4025,7 @@
                        delay(10 * 1000);
                        wm_gate_hw_phy_config_ich8lan(sc, false);
                }
-               /* XXX Set EEE LPI Update Timer to 200usec */   
+               /* XXX Set EEE LPI Update Timer to 200usec */
        }
 }
 
@@ -4121,7 +4122,7 @@



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