[src/trunk]: src Add support for AMD Family 17h.

[maxv <maxv%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/324d18998dcc
branches:  trunk
changeset: 451648:324d18998dcc
user:      maxv <maxv%NetBSD.org@localhost>
date:      Wed May 29 17:09:17 2019 +0000

description:
Add support for AMD Family 17h.

diffstat:

 sys/dev/tprof/tprof_x86_amd.c   |   5 +-
 usr.sbin/tprof/arch/tprof_x86.c |  64 +++++++++++++++++++++++++++++++++++-----
 usr.sbin/tprof/tprof.8          |   8 +++-
 3 files changed, 64 insertions(+), 13 deletions(-)

diffs (149 lines):

diff -r 328dbf389f0c -r 324d18998dcc sys/dev/tprof/tprof_x86_amd.c
--- a/sys/dev/tprof/tprof_x86_amd.c     Wed May 29 16:54:41 2019 +0000
+++ b/sys/dev/tprof/tprof_x86_amd.c     Wed May 29 17:09:17 2019 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: tprof_x86_amd.c,v 1.2 2018/07/24 09:47:35 maxv Exp $   */
+/*     $NetBSD: tprof_x86_amd.c,v 1.3 2019/05/29 17:09:17 maxv Exp $   */
 
 /*
  * Copyright (c) 2018 The NetBSD Foundation, Inc.
@@ -56,7 +56,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: tprof_x86_amd.c,v 1.2 2018/07/24 09:47:35 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: tprof_x86_amd.c,v 1.3 2019/05/29 17:09:17 maxv Exp $");
 
 #include <sys/param.h>
 #include <sys/systm.h>
@@ -205,6 +205,7 @@
 
        switch (CPUID_TO_FAMILY(ci->ci_signature)) {
        case 0x10:
+       case 0x17:
                return TPROF_IDENT_AMD_GENERIC;
        }
 
diff -r 328dbf389f0c -r 324d18998dcc usr.sbin/tprof/arch/tprof_x86.c
--- a/usr.sbin/tprof/arch/tprof_x86.c   Wed May 29 16:54:41 2019 +0000
+++ b/usr.sbin/tprof/arch/tprof_x86.c   Wed May 29 17:09:17 2019 +0000
@@ -1,7 +1,7 @@
-/*     $NetBSD: tprof_x86.c,v 1.7 2018/11/26 23:20:57 knakahara Exp $  */
+/*     $NetBSD: tprof_x86.c,v 1.8 2019/05/29 17:09:18 maxv Exp $       */
 
 /*
- * Copyright (c) 2018 The NetBSD Foundation, Inc.
+ * Copyright (c) 2018-2019 The NetBSD Foundation, Inc.
  * All rights reserved.
  *
  * This code is derived from software contributed to The NetBSD Foundation
@@ -654,11 +654,57 @@
        .next = NULL
 };
 
-static struct event_table *
-init_amd_f10h(void)
-{
-       return &amd_f10h;
-}
+/*
+ * AMD Family 17h
+ */
+static struct name_to_event amd_f17h_names[] = {
+       { "FpRetx87FpOps",              0x02, __BITS(2,0), true },
+       { "FpRetSseAvxOps",             0x03, __BITS(7,0), true },
+       { "FpRetiredSerOps",            0x05, __BITS(3,0), true },
+       { "LsL1DTlbMiss",               0x45, __BITS(7,0), true },
+       { "LsTableWalker",              0x46, __BITS(3,0), true },
+       { "LsMisalAccesses",            0x47, 0x00, true },
+       { "LsInefSwPref",               0x52, __BITS(1,0), true },
+       { "LsNotHaltedCyc",             0x76, 0x00, true },
+       { "IcFw32",                     0x80, 0x00, true },
+       { "IcFw32Miss",                 0x81, 0x00, true },
+       { "IcCacheFillL2",              0x82, 0x00, true },
+       { "IcCacheFillSys",             0x83, 0x00, true },
+       { "IcFetchStall",               0x87, __BITS(2,0), true },
+       { "IcCacheInval",               0x8C, __BITS(1,0), true },
+       { "BpL1TlbMissL2Hit",           0x84, 0x00, true },
+       { "BpL1TlbMissL2Miss",          0x85, 0x00, true },
+       { "BpSnpReSync",                0x86, 0x00, true },
+       { "BpL1BTBCorrect",             0x8A, 0x00, true },
+       { "BpL2BTBCorrect",             0x8B, 0x00, true },
+       { "BpTlbRel",                   0x99, 0x00, true },
+       { "ExRetInstr",                 0xC0, 0x00, true },
+       { "ExRetCops",                  0xC1, 0x00, true },
+       { "ExRetBrn",                   0xC2, 0x00, true },
+       { "ExRetBrnMisp",               0xC3, 0x00, true },
+       { "ExRetBrnTkn",                0xC4, 0x00, true },
+       { "ExRetBrnTknMisp",            0xC5, 0x00, true },
+       { "ExRetBrnFar",                0xC6, 0x00, true },
+       { "ExRetBrnResync",             0xC7, 0x00, true },
+       { "ExRetBrnIndMisp",            0xCA, 0x00, true },
+       { "ExRetNearRet",               0xC8, 0x00, true },
+       { "ExRetNearRetMispred",        0xC9, 0x00, true },
+       { "ExRetMmxFpInstr@X87",        0xCB, __BIT(0), true },
+       { "ExRetMmxFpInstr@Mmx",        0xCB, __BIT(1), true },
+       { "ExRetMmxFpInstr@Sse",        0xCB, __BIT(2), true },
+       { "ExRetCond",                  0xD1, 0x00, true },
+       { "ExRetCondMisp",              0xD2, 0x00, true },
+       { "ExDivBusy",                  0xD3, 0x00, true },
+       { "ExDivCount",                 0xD4, 0x00, true },
+};
+
+static struct event_table amd_f17h = {
+       .tablename = "AMD Family 17h",
+       .names = amd_f17h_names,
+       .nevents = sizeof(amd_f17h_names) /
+           sizeof(struct name_to_event),
+       .next = NULL
+};
 
 static struct event_table *
 init_amd_generic(void)
@@ -673,7 +719,9 @@
 
        switch (CPUID_TO_FAMILY(eax)) {
        case 0x10:
-               return init_amd_f10h();
+               return &amd_f10h;
+       case 0x17:
+               return &amd_f17h;
        }
 
        return NULL;
diff -r 328dbf389f0c -r 324d18998dcc usr.sbin/tprof/tprof.8
--- a/usr.sbin/tprof/tprof.8    Wed May 29 16:54:41 2019 +0000
+++ b/usr.sbin/tprof/tprof.8    Wed May 29 17:09:17 2019 +0000
@@ -1,4 +1,4 @@
-.\"    $NetBSD: tprof.8,v 1.13 2018/11/26 23:20:56 knakahara Exp $
+.\"    $NetBSD: tprof.8,v 1.14 2019/05/29 17:09:17 maxv Exp $
 .\"
 .\" Copyright (c)2011 YAMAMOTO Takashi,
 .\" All rights reserved.
@@ -24,7 +24,7 @@
 .\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 .\" SUCH DAMAGE.
 .\"
-.Dd November 27, 2018
+.Dd May 29, 2019
 .Dt TPROF 8
 .Os
 .Sh NAME
@@ -130,6 +130,8 @@
 .It
 x86 AMD Family 10h
 .It
+x86 AMD Family 17h
+.It
 x86 Intel Generic (all Intel CPUs)
 .It
 x86 Intel Skylake/Kabylake
@@ -168,7 +170,7 @@
 .An -nosplit
 The
 .Nm
-utility is written by
+utility was written by
 .An YAMAMOTO Takashi .
 It was revamped by
 .An Maxime Villard