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[src/trunk]: src/sys No functional change:
details: https://anonhg.NetBSD.org/src/rev/591ca34502f9
branches: trunk
changeset: 451442:591ca34502f9
user: msaitoh <msaitoh%NetBSD.org@localhost>
date: Thu May 23 10:30:35 2019 +0000
description:
No functional change:
- Change ac(was arpcom) to ec(ethercom)
- Simplify MII structure initialization.
- u_int*_t -> uint*_t.
- KNF
diffstat:
sys/arch/arm/ep93xx/epe.c | 174 ++++++++++++++++++++--------------------
sys/arch/mac68k/dev/if_mc.c | 58 ++++++------
sys/arch/macppc/dev/am79c950.c | 14 +-
sys/dev/cadence/if_cemac.c | 62 +++++++------
sys/dev/ic/lance.c | 16 +-
sys/dev/pci/if_txp.c | 16 +-
sys/dev/scsipi/if_se.c | 53 ++++++------
7 files changed, 196 insertions(+), 197 deletions(-)
diffs (truncated from 1300 to 300 lines):
diff -r 6275e56c85b6 -r 591ca34502f9 sys/arch/arm/ep93xx/epe.c
--- a/sys/arch/arm/ep93xx/epe.c Thu May 23 09:15:45 2019 +0000
+++ b/sys/arch/arm/ep93xx/epe.c Thu May 23 10:30:35 2019 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: epe.c,v 1.40 2019/02/05 06:17:01 msaitoh Exp $ */
+/* $NetBSD: epe.c,v 1.41 2019/05/23 10:30:35 msaitoh Exp $ */
/*
* Copyright (c) 2004 Jesse Off
@@ -27,7 +27,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: epe.c,v 1.40 2019/02/05 06:17:01 msaitoh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: epe.c,v 1.41 2019/05/23 10:30:35 msaitoh Exp $");
#include <sys/types.h>
#include <sys/param.h>
@@ -45,7 +45,7 @@
#include <arm/cpufunc.h>
-#include <arm/ep93xx/epsocvar.h>
+#include <arm/ep93xx/epsocvar.h>
#include <arm/ep93xx/ep93xxvar.h>
#include <net/if.h>
@@ -67,8 +67,8 @@
#endif
#include <arm/ep93xx/ep93xxreg.h>
-#include <arm/ep93xx/epereg.h>
-#include <arm/ep93xx/epevar.h>
+#include <arm/ep93xx/epereg.h>
+#include <arm/ep93xx/epevar.h>
#define DEFAULT_MDCDIV 32
@@ -131,7 +131,7 @@
sc->sc_intr = sa->sa_intr;
sc->sc_dmat = sa->sa_dmat;
- if (bus_space_map(sa->sa_iot, sa->sa_addr, sa->sa_size,
+ if (bus_space_map(sa->sa_iot, sa->sa_addr, sa->sa_size,
0, &sc->sc_ioh))
panic("%s: Cannot map registers", device_xname(self));
@@ -161,20 +161,19 @@
cur = (uint32_t *)(EPE_READ(TXStsQCurAdd) -
sc->ctrlpage_dsaddr + (char*)sc->ctrlpage);
- if (sc->TXStsQ_cur != cur) {
- CTRLPAGE_DMASYNC(TX_QLEN * 2 * sizeof(uint32_t),
+ if (sc->TXStsQ_cur != cur) {
+ CTRLPAGE_DMASYNC(TX_QLEN * 2 * sizeof(uint32_t),
TX_QLEN * sizeof(uint32_t), BUS_DMASYNC_PREREAD);
- } else {
+ } else
return 0;
- }
do {
uint32_t tbi = *sc->TXStsQ_cur & 0x7fff;
struct mbuf *m = sc->txq[tbi].m;
- if ((*sc->TXStsQ_cur & TXStsQ_TxWE) == 0) {
+ if ((*sc->TXStsQ_cur & TXStsQ_TxWE) == 0)
ifp->if_oerrors++;
- }
+
bus_dmamap_unload(sc->sc_dmat, sc->txq[tbi].m_dmamap);
m_freem(m);
do {
@@ -188,7 +187,7 @@
if (sc->TXStsQ_cur >= sc->TXStsQ + TX_QLEN) {
sc->TXStsQ_cur = sc->TXStsQ;
}
- } while (sc->TXStsQ_cur != cur);
+ } while (sc->TXStsQ_cur != cur);
sc->TXDQ_avail += ndq;
if (ifp->if_flags & IFF_OACTIVE) {
@@ -211,11 +210,11 @@
cur = (uint32_t *)(EPE_READ(RXStsQCurAdd) -
sc->ctrlpage_dsaddr + (char*)sc->ctrlpage);
CTRLPAGE_DMASYNC(TX_QLEN * 3 * sizeof(uint32_t),
- RX_QLEN * 4 * sizeof(uint32_t),
+ RX_QLEN * 4 * sizeof(uint32_t),
BUS_DMASYNC_PREREAD);
while (sc->RXStsQ_cur != cur) {
- if ((sc->RXStsQ_cur[0] & (RXStsQ_RWE|RXStsQ_RFP|RXStsQ_EOB)) ==
- (RXStsQ_RWE|RXStsQ_RFP|RXStsQ_EOB)) {
+ if ((sc->RXStsQ_cur[0] & (RXStsQ_RWE | RXStsQ_RFP |RXStsQ_EOB))
+ == (RXStsQ_RWE | RXStsQ_RFP | RXStsQ_EOB)) {
uint32_t bi = (sc->RXStsQ_cur[1] >> 16) & 0x7fff;
uint32_t fl = sc->RXStsQ_cur[1] & 0xffff;
struct mbuf *m;
@@ -223,46 +222,44 @@
MGETHDR(m, M_DONTWAIT, MT_DATA);
if (m != NULL) MCLGET(m, M_DONTWAIT);
if (m != NULL && (m->m_flags & M_EXT)) {
- bus_dmamap_unload(sc->sc_dmat,
+ bus_dmamap_unload(sc->sc_dmat,
sc->rxq[bi].m_dmamap);
m_set_rcvif(sc->rxq[bi].m, ifp);
- sc->rxq[bi].m->m_pkthdr.len =
+ sc->rxq[bi].m->m_pkthdr.len =
sc->rxq[bi].m->m_len = fl;
if_percpuq_enqueue(ifp->if_percpuq,
sc->rxq[bi].m);
sc->rxq[bi].m = m;
- bus_dmamap_load(sc->sc_dmat,
- sc->rxq[bi].m_dmamap,
+ bus_dmamap_load(sc->sc_dmat,
+ sc->rxq[bi].m_dmamap,
m->m_ext.ext_buf, MCLBYTES,
NULL, BUS_DMA_NOWAIT);
- sc->RXDQ[bi * 2] =
+ sc->RXDQ[bi * 2] =
sc->rxq[bi].m_dmamap->dm_segs[0].ds_addr;
} else {
/* Drop packets until we can get replacement
* empty mbufs for the RXDQ.
*/
- if (m != NULL) {
+ if (m != NULL)
m_freem(m);
- }
+
ifp->if_ierrors++;
- }
- } else {
+ }
+ } else
ifp->if_ierrors++;
- }
ndq++;
sc->RXStsQ_cur += 2;
- if (sc->RXStsQ_cur >= sc->RXStsQ + (RX_QLEN * 2)) {
+ if (sc->RXStsQ_cur >= sc->RXStsQ + (RX_QLEN * 2))
sc->RXStsQ_cur = sc->RXStsQ;
- }
}
if (ndq > 0) {
ifp->if_ipackets += ndq;
CTRLPAGE_DMASYNC(TX_QLEN * 3 * sizeof(uint32_t),
- RX_QLEN * 4 * sizeof(uint32_t),
- BUS_DMASYNC_PREWRITE|BUS_DMASYNC_PREREAD);
+ RX_QLEN * 4 * sizeof(uint32_t),
+ BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
EPE_WRITE(RXStsEnq, ndq);
EPE_WRITE(RXDEnq, ndq);
ndq = 0;
@@ -270,13 +267,13 @@
if (epe_gctx(sc) > 0 && IFQ_IS_EMPTY(&ifp->if_snd) == 0) {
if_schedule_deferred_start(ifp);
- }
+ }
irq = EPE_READ(IntStsC);
- if ((irq & (IntSts_RxSQ|IntSts_ECI)) != 0)
+ if ((irq & (IntSts_RxSQ | IntSts_ECI)) != 0)
goto begin;
- return (1);
+ return 1;
}
@@ -296,12 +293,13 @@
/* Read ethernet MAC, should already be set by bootrom */
bus_space_read_region_1(sc->sc_iot, sc->sc_ioh, EPE_IndAd,
sc->sc_enaddr, ETHER_ADDR_LEN);
- aprint_normal_dev(sc->sc_dev, "MAC address %s\n",
+ aprint_normal_dev(sc->sc_dev, "MAC address %s\n",
ether_sprintf(sc->sc_enaddr));
/* Soft Reset the MAC */
EPE_WRITE(SelfCtl, SelfCtl_RESET);
- while(EPE_READ(SelfCtl) & SelfCtl_RESET);
+ while (EPE_READ(SelfCtl) & SelfCtl_RESET)
+ ;
/* suggested magic initialization values from datasheet */
EPE_WRITE(RXBufThrshld, 0x800040);
@@ -312,11 +310,11 @@
EPE_WRITE(TXDThrshld, 0x40002);
/* Allocate a page of memory for descriptor and status queues */
- err = bus_dmamem_alloc(sc->sc_dmat, PAGE_SIZE, 0, PAGE_SIZE,
+ err = bus_dmamem_alloc(sc->sc_dmat, PAGE_SIZE, 0, PAGE_SIZE,
&segs, 1, &rsegs, BUS_DMA_WAITOK);
if (err == 0) {
- err = bus_dmamem_map(sc->sc_dmat, &segs, 1, PAGE_SIZE,
- &sc->ctrlpage, (BUS_DMA_WAITOK|BUS_DMA_COHERENT));
+ err = bus_dmamem_map(sc->sc_dmat, &segs, 1, PAGE_SIZE,
+ &sc->ctrlpage, (BUS_DMA_WAITOK | BUS_DMA_COHERENT));
}
if (err == 0) {
err = bus_dmamap_create(sc->sc_dmat, PAGE_SIZE, 1, PAGE_SIZE,
@@ -331,7 +329,7 @@
}
sc->ctrlpage_dsaddr = sc->ctrlpage_dmamap->dm_segs[0].ds_addr;
memset(sc->ctrlpage, 0, PAGE_SIZE);
-
+
/* Set up pointers to start of each queue in kernel addr space.
* Each descriptor queue or status queue entry uses 2 words
*/
@@ -345,12 +343,12 @@
sc->RXStsQ_cur = sc->RXStsQ;
/* Program each queue's start addr, cur addr, and len registers
- * with the physical addresses.
+ * with the physical addresses.
*/
addr = (char *)sc->ctrlpage_dmamap->dm_segs[0].ds_addr;
EPE_WRITE(TXDQBAdd, (uint32_t)addr);
EPE_WRITE(TXDQCurAdd, (uint32_t)addr);
- EPE_WRITE(TXDQBLen, TX_QLEN * 2 * sizeof(uint32_t));
+ EPE_WRITE(TXDQBLen, TX_QLEN * 2 * sizeof(uint32_t));
addr += (sc->TXStsQ - sc->TXDQ) * sizeof(uint32_t);
EPE_WRITE(TXStsQBAdd, (uint32_t)addr);
@@ -361,24 +359,23 @@
EPE_WRITE(RXDQBAdd, (uint32_t)addr);
EPE_WRITE(RXDCurAdd, (uint32_t)addr);
EPE_WRITE(RXDQBLen, RX_QLEN * 2 * sizeof(uint32_t));
-
+
addr += (sc->RXStsQ - sc->RXDQ) * sizeof(uint32_t);
EPE_WRITE(RXStsQBAdd, (uint32_t)addr);
EPE_WRITE(RXStsQCurAdd, (uint32_t)addr);
EPE_WRITE(RXStsQBLen, RX_QLEN * 2 * sizeof(uint32_t));
/* Populate the RXDQ with mbufs */
- for(i = 0; i < RX_QLEN; i++) {
+ for (i = 0; i < RX_QLEN; i++) {
struct mbuf *m;
- bus_dmamap_create(sc->sc_dmat, MCLBYTES, TX_QLEN/4, MCLBYTES, 0,
- BUS_DMA_WAITOK, &sc->rxq[i].m_dmamap);
+ bus_dmamap_create(sc->sc_dmat, MCLBYTES, TX_QLEN/4, MCLBYTES,
+ 0, BUS_DMA_WAITOK, &sc->rxq[i].m_dmamap);
MGETHDR(m, M_WAIT, MT_DATA);
MCLGET(m, M_WAIT);
sc->rxq[i].m = m;
- bus_dmamap_load(sc->sc_dmat, sc->rxq[i].m_dmamap,
- m->m_ext.ext_buf, MCLBYTES, NULL,
- BUS_DMA_WAITOK);
+ bus_dmamap_load(sc->sc_dmat, sc->rxq[i].m_dmamap,
+ m->m_ext.ext_buf, MCLBYTES, NULL, BUS_DMA_WAITOK);
sc->RXDQ[i * 2] = sc->rxq[i].m_dmamap->dm_segs[0].ds_addr;
sc->RXDQ[i * 2 + 1] = (i << 16) | MCLBYTES;
@@ -386,9 +383,9 @@
MCLBYTES, BUS_DMASYNC_PREREAD);
}
- for(i = 0; i < TX_QLEN; i++) {
+ for (i = 0; i < TX_QLEN; i++) {
bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1, MCLBYTES, 0,
- (BUS_DMA_WAITOK|BUS_DMA_ALLOCNOW),
+ (BUS_DMA_WAITOK | BUS_DMA_ALLOCNOW),
&sc->txq[i].m_dmamap);
sc->txq[i].m = NULL;
sc->TXDQ[i * 2 + 1] = (i << 16);
@@ -397,7 +394,7 @@
/* Divide HCLK by 32 for MDC clock */
if (device_cfdata(sc->sc_dev)->cf_flags)
mdcdiv = device_cfdata(sc->sc_dev)->cf_flags;
- EPE_WRITE(SelfCtl, (SelfCtl_MDCDIV(mdcdiv)|SelfCtl_PSPRS));
+ EPE_WRITE(SelfCtl, (SelfCtl_MDCDIV(mdcdiv) | SelfCtl_PSPRS));
sc->sc_mii.mii_ifp = ifp;
sc->sc_mii.mii_readreg = epe_mii_readreg;
@@ -408,18 +405,18 @@
ether_mediastatus);
mii_attach(sc->sc_dev, &sc->sc_mii, 0xffffffff, MII_PHY_ANY,
MII_OFFSET_ANY, 0);
- ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_AUTO);
+ ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER | IFM_AUTO);
- EPE_WRITE(BMCtl, BMCtl_RxEn|BMCtl_TxEn);
+ EPE_WRITE(BMCtl, BMCtl_RxEn | BMCtl_TxEn);
EPE_WRITE(IntEn, IntEn_REOFIE);
/* maximum valid max frame length */
- EPE_WRITE(MaxFrmLen, (0x7ff << 16)|MHLEN);
+ EPE_WRITE(MaxFrmLen, (0x7ff << 16) | MHLEN);
/* wait for receiver ready */
- while((EPE_READ(BMSts) & BMSts_RxAct) == 0)
+ while ((EPE_READ(BMSts) & BMSts_RxAct) == 0)
continue;
/* enqueue the entries in RXStsQ and RXDQ */
- CTRLPAGE_DMASYNC(0, sc->ctrlpage_dmamap->dm_mapsize,
- BUS_DMASYNC_PREWRITE|BUS_DMASYNC_PREREAD);
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