[src/trunk]: src/sys/arch/x86/x86 Enable EagerFPU by default. Sent on port-am...

[maxv <maxv%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/46dce9cf44a7
branches:  trunk
changeset: 451374:46dce9cf44a7
user:      maxv <maxv%NetBSD.org@localhost>
date:      Sat May 18 13:44:57 2019 +0000

description:
Enable EagerFPU by default. Sent on port-amd64@.

diffstat:

 sys/arch/x86/x86/identcpu.c |  49 ++------------------------------------------
 1 files changed, 3 insertions(+), 46 deletions(-)

diffs (74 lines):

diff -r be49300abb07 -r 46dce9cf44a7 sys/arch/x86/x86/identcpu.c
--- a/sys/arch/x86/x86/identcpu.c       Sat May 18 13:32:12 2019 +0000
+++ b/sys/arch/x86/x86/identcpu.c       Sat May 18 13:44:57 2019 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: identcpu.c,v 1.89 2019/05/15 18:27:51 maxv Exp $       */
+/*     $NetBSD: identcpu.c,v 1.90 2019/05/18 13:44:57 maxv Exp $       */
 
 /*-
  * Copyright (c) 1999, 2000, 2001, 2006, 2007, 2008 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: identcpu.c,v 1.89 2019/05/15 18:27:51 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: identcpu.c,v 1.90 2019/05/18 13:44:57 maxv Exp $");
 
 #include "opt_xen.h"
 
@@ -745,54 +745,11 @@
 }
 
 static void
-cpu_probe_fpu_leak(struct cpu_info *ci)
-{
-       /*
-        * INTEL-SA-00145. Affected CPUs are from Family 6.
-        */
-       if (cpu_vendor != CPUVENDOR_INTEL) {
-               return;
-       }
-       if (CPUID_TO_FAMILY(ci->ci_signature) != 6) {
-               return;
-       }
-
-       switch (CPUID_TO_MODEL(ci->ci_signature)) {
-       /* Atom CPUs are not vulnerable. */
-       case 0x1c: /* Pineview */
-       case 0x26: /* Lincroft */
-       case 0x27: /* Penwell */
-       case 0x35: /* Cloverview */
-       case 0x36: /* Cedarview */
-       case 0x37: /* Baytrail / Valleyview (Silvermont) */
-       case 0x4d: /* Avaton / Rangely (Silvermont) */
-       case 0x4c: /* Cherrytrail / Brasswell */
-       case 0x4a: /* Merrifield */
-       case 0x5a: /* Moorefield */
-       case 0x5c: /* Goldmont */
-       case 0x5f: /* Denverton */
-       case 0x7a: /* Gemini Lake */
-               break;
-
-       /* Knights CPUs are not vulnerable. */
-       case 0x57: /* Knights Landing */
-       case 0x85: /* Knights Mill */
-               break;
-
-       /* The rest is vulnerable. */
-       default:
-               x86_fpu_eager = true;
-               break;
-       }
-}
-
-static void
 cpu_probe_fpu(struct cpu_info *ci)
 {
        u_int descs[4];
 
-       cpu_probe_fpu_leak(ci);
-
+       x86_fpu_eager = true;
        x86_fpu_save = FPU_SAVE_FSAVE;
 
 #ifdef i386