[src/trunk]: src/sys/dev/pci - Control TX/RX descriptor snooping control bits...

[msaitoh <msaitoh%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/ff78a5cc698e
branches:  trunk
changeset: 445979:ff78a5cc698e
user:      msaitoh <msaitoh%NetBSD.org@localhost>
date:      Mon Nov 19 06:38:58 2018 +0000

description:
- Control TX/RX descriptor snooping control bits on ICH8 and newer.
  Only on ICH8, No-snoop bits are opposite polarity. On my Thinkpas X61,
  the default value of this bits are all zero, so this commit changes
  the snoop function enable on the machine. I tested with some other
  PCH machines and those bits are all zero (enable snoop by default),
  so this commit won't affect to some machines.
- Disable relax ordering on 82546GB(Device ID 0x1099 and 0x10b5) or >= ICH8.
  Same as other OSes.

diffstat:

 sys/dev/pci/if_wm.c    |  25 +++++++++++++++++++++++--
 sys/dev/pci/if_wmreg.h |   8 +++++++-
 2 files changed, 30 insertions(+), 3 deletions(-)

diffs (68 lines):

diff -r f803fe86c8ec -r ff78a5cc698e sys/dev/pci/if_wm.c
--- a/sys/dev/pci/if_wm.c       Mon Nov 19 04:54:37 2018 +0000
+++ b/sys/dev/pci/if_wm.c       Mon Nov 19 06:38:58 2018 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: if_wm.c,v 1.597 2018/11/14 03:41:20 msaitoh Exp $      */
+/*     $NetBSD: if_wm.c,v 1.598 2018/11/19 06:38:58 msaitoh Exp $      */
 
 /*
  * Copyright (c) 2001, 2002, 2003, 2004 Wasabi Systems, Inc.
@@ -83,7 +83,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: if_wm.c,v 1.597 2018/11/14 03:41:20 msaitoh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: if_wm.c,v 1.598 2018/11/19 06:38:58 msaitoh Exp $");
 
 #ifdef _KERNEL_OPT
 #include "opt_net_mpsafe.h"
@@ -5491,6 +5491,27 @@
        if (sc->sc_flags & WM_F_HAS_MII)
                wm_gmii_reset(sc);
 
+       if (sc->sc_type >= WM_T_ICH8) {
+               reg = CSR_READ(sc, WMREG_GCR);
+               /*
+                * ICH8 No-snoop bits are opposite polarity. Set to snoop by
+                * default after reset.
+                */
+               if (sc->sc_type == WM_T_ICH8)
+                       reg |= GCR_NO_SNOOP_ALL;
+               else
+                       reg &= ~GCR_NO_SNOOP_ALL;
+               CSR_WRITE(sc, WMREG_GCR, reg);
+       }
+       if ((sc->sc_type >= WM_T_ICH8)
+           || (sc->sc_pcidevid == PCI_PRODUCT_INTEL_82546GB_QUAD_COPPER)
+           || (sc->sc_pcidevid == PCI_PRODUCT_INTEL_82546GB_QUAD_COPPER_KSP3)) {
+
+               reg = CSR_READ(sc, WMREG_CTRL_EXT);
+               reg |= CTRL_EXT_RO_DIS;
+               CSR_WRITE(sc, WMREG_CTRL_EXT, reg);
+       }
+
        /* Calculate (E)ITR value */
        if ((sc->sc_flags & WM_F_NEWQUEUE) != 0 && sc->sc_type != WM_T_82575) {
                /*
diff -r f803fe86c8ec -r ff78a5cc698e sys/dev/pci/if_wmreg.h
--- a/sys/dev/pci/if_wmreg.h    Mon Nov 19 04:54:37 2018 +0000
+++ b/sys/dev/pci/if_wmreg.h    Mon Nov 19 06:38:58 2018 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: if_wmreg.h,v 1.108 2018/11/02 03:22:19 msaitoh Exp $   */
+/*     $NetBSD: if_wmreg.h,v 1.109 2018/11/19 06:38:58 msaitoh Exp $   */
 
 /*
  * Copyright (c) 2001 Wasabi Systems, Inc.
@@ -1282,6 +1282,12 @@
 #define GCR_CMPL_TMOUT_RESEND  0x00010000
 #define GCR_CAP_VER2           0x00040000
 #define GCR_L1_ACT_WITHOUT_L0S_RX 0x08000000
+#define GCR_NO_SNOOP_ALL (GCR_RXD_NO_SNOOP | \
+           GCR_RXDSCW_NO_SNOOP |            \
+           GCR_RXDSCR_NO_SNOOP |            \
+           GCR_TXD_NO_SNOOP |               \
+           GCR_TXDSCW_NO_SNOOP |            \
+           GCR_TXDSCR_NO_SNOOP)
 
 #define WMREG_FACTPS   0x5b30  /* Function Active and Power State to MNG */
 #define FACTPS_MNGCG           0x20000000