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[src/trunk]: src/sys/arch/arm/cortex Update sc_mptargets atomically, as PEs w...



details:   https://anonhg.NetBSD.org/src/rev/52c04f01e87c
branches:  trunk
changeset: 433366:52c04f01e87c
user:      jmcneill <jmcneill%NetBSD.org@localhost>
date:      Mon Sep 10 09:48:57 2018 +0000

description:
Update sc_mptargets atomically, as PEs will be started up in parallel w/o locking here

diffstat:

 sys/arch/arm/cortex/gic.c |  7 ++++---
 1 files changed, 4 insertions(+), 3 deletions(-)

diffs (35 lines):

diff -r 42c36f4d45d1 -r 52c04f01e87c sys/arch/arm/cortex/gic.c
--- a/sys/arch/arm/cortex/gic.c Mon Sep 10 07:30:33 2018 +0000
+++ b/sys/arch/arm/cortex/gic.c Mon Sep 10 09:48:57 2018 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: gic.c,v 1.35 2018/07/15 16:04:07 jmcneill Exp $        */
+/*     $NetBSD: gic.c,v 1.36 2018/09/10 09:48:57 jmcneill Exp $        */
 /*-
  * Copyright (c) 2012 The NetBSD Foundation, Inc.
  * All rights reserved.
@@ -34,7 +34,7 @@
 #define _INTR_PRIVATE
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: gic.c,v 1.35 2018/07/15 16:04:07 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: gic.c,v 1.36 2018/09/10 09:48:57 jmcneill Exp $");
 
 #include <sys/param.h>
 #include <sys/bus.h>
@@ -43,6 +43,7 @@
 #include <sys/evcnt.h>
 #include <sys/intr.h>
 #include <sys/proc.h>
+#include <sys/atomic.h>
 
 #include <arm/armreg.h>
 #include <arm/atomic.h>
@@ -514,7 +515,7 @@
 {
        struct armgic_softc * const sc = PICTOSOFTC(pic);
        sc->sc_target[cpu_index(ci)] = gicd_find_targets(sc);
-       sc->sc_mptargets |= sc->sc_target[cpu_index(ci)];
+       atomic_or_32(&sc->sc_mptargets, sc->sc_target[cpu_index(ci)]);
        KASSERTMSG(ci->ci_cpl == IPL_HIGH, "ipl %d not IPL_HIGH", ci->ci_cpl);
        armgic_cpu_init_priorities(sc);
        if (!CPU_IS_PRIMARY(ci)) {



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