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[src/trunk]: src/sys/dev/pci Decode TPH Requester Control register.



details:   https://anonhg.NetBSD.org/src/rev/2ef1ed89a68f
branches:  trunk
changeset: 353809:2ef1ed89a68f
user:      msaitoh <msaitoh%NetBSD.org@localhost>
date:      Wed May 24 06:51:27 2017 +0000

description:
Decode TPH Requester Control register.

diffstat:

 sys/dev/pci/pci_subr.c |  38 ++++++++++++++++++++++++++++++++++++--
 sys/dev/pci/pcireg.h   |  13 ++++++++++---
 2 files changed, 46 insertions(+), 5 deletions(-)

diffs (86 lines):

diff -r 9972697f1b74 -r 2ef1ed89a68f sys/dev/pci/pci_subr.c
--- a/sys/dev/pci/pci_subr.c    Wed May 24 06:31:07 2017 +0000
+++ b/sys/dev/pci/pci_subr.c    Wed May 24 06:51:27 2017 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: pci_subr.c,v 1.181 2017/05/22 04:21:20 msaitoh Exp $   */
+/*     $NetBSD: pci_subr.c,v 1.182 2017/05/24 06:51:27 msaitoh Exp $   */
 
 /*
  * Copyright (c) 1997 Zubin D. Dittia.  All rights reserved.
@@ -40,7 +40,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: pci_subr.c,v 1.181 2017/05/22 04:21:20 msaitoh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pci_subr.c,v 1.182 2017/05/24 06:51:27 msaitoh Exp $");
 
 #ifdef _KERNEL_OPT
 #include "opt_pci.h"
@@ -3410,6 +3410,40 @@
                    (unsigned char)__SHIFTOUT(reg, PCI_TPH_REQ_CAP_STTBLLOC)));
        size = __SHIFTOUT(reg, PCI_TPH_REQ_CAP_STTBLSIZ) + 1;
        printf("      ST Table Size: %d\n", size);
+
+       reg = regs[o2i(extcapoff + PCI_TPH_REQ_CTL)];
+       printf("    TPH Requester Control register: 0x%08x\n", reg);
+       printf("      ST Mode Select: ");
+       switch (__SHIFTOUT(reg, PCI_TPH_REQ_CTL_STSEL)) {
+       case PCI_TPH_REQ_CTL_STSEL_NO:
+               printf("No ST Mode\n");
+               break;
+       case PCI_TPH_REQ_CTL_STSEL_IV:
+               printf("Interrupt Vector Mode\n");
+               break;
+       case PCI_TPH_REQ_CTL_STSEL_DS:
+               printf("Device Specific Mode\n");
+               break;
+       default:
+               printf("(reserved vaule)\n");
+               break;
+       }
+       printf("      TPH Requester Enable: ");
+       switch (__SHIFTOUT(reg, PCI_TPH_REQ_CTL_TPHREQEN)) {
+       case PCI_TPH_REQ_CTL_TPHREQEN_NO: /* 0x0 */
+               printf("Not permitted\n");
+               break;
+       case PCI_TPH_REQ_CTL_TPHREQEN_TPH:
+               printf("TPH and not Extended TPH\n");
+               break;
+       case PCI_TPH_REQ_CTL_TPHREQEN_ETPH:
+               printf("TPH and Extended TPH");
+               break;
+       default:
+               printf("(reserved vaule)\n");
+               break;
+       }
+       
        for (i = 0; i < size ; i += 2) {
                reg = regs[o2i(extcapoff + PCI_TPH_REQ_STTBL + i / 2)];
                for (j = 0; j < 2 ; j++) {
diff -r 9972697f1b74 -r 2ef1ed89a68f sys/dev/pci/pcireg.h
--- a/sys/dev/pci/pcireg.h      Wed May 24 06:31:07 2017 +0000
+++ b/sys/dev/pci/pcireg.h      Wed May 24 06:51:27 2017 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: pcireg.h,v 1.128 2017/04/21 09:01:52 msaitoh Exp $     */
+/*     $NetBSD: pcireg.h,v 1.129 2017/05/24 06:51:27 msaitoh Exp $     */
 
 /*
  * Copyright (c) 1995, 1996, 1999, 2000
@@ -1856,8 +1856,15 @@
 #define        PCI_TPH_REQ_CAP_STTBLLOC __BITS(10, 9)  /* ST Table Location */
 #define        PCI_TPH_REQ_CAP_STTBLSIZ __BITS(26, 16) /* ST Table Size */
 #define        PCI_TPH_REQ_CTL 0x08    /* TPH Requester Control */
-#define        PCI_TPH_REQ_CTL_STSEL   _BITS(2, 0)     /* ST Mode Select */
-#define        PCI_TPH_REQ_CTL_TPHREQEN _BITS(9, 8)    /* TPH Requester Enable */
+#define        PCI_TPH_REQ_CTL_STSEL   __BITS(2, 0)    /* ST Mode Select */
+#define        PCI_TPH_REQ_CTL_STSEL_NO        0        /* No ST Mode */
+#define        PCI_TPH_REQ_CTL_STSEL_IV        1        /* Interrupt Vector Mode */
+#define        PCI_TPH_REQ_CTL_STSEL_DS        2        /* Device Specific Mode */
+#define        PCI_TPH_REQ_CTL_TPHREQEN __BITS(9, 8)   /* TPH Requester Enable */
+#define        PCI_TPH_REQ_CTL_TPHREQEN_NO     0        /* Not permitted */
+#define        PCI_TPH_REQ_CTL_TPHREQEN_TPH    1        /* TPH and no extended TPH */
+#define        PCI_TPH_REQ_CTL_TPHREQEN_RSVD   2        /* Reserved */
+#define        PCI_TPH_REQ_CTL_TPHREQEN_ETPH   3        /* TPH and Extended TPH */
 #define        PCI_TPH_REQ_STTBL 0x0c  /* TPH ST Table */
 
 /*



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