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[src/trunk]: src/sys/arch/sparc64 add plumbing to support bus_space_mmap() with:
details: https://anonhg.NetBSD.org/src/rev/2f6c46b53af1
branches: trunk
changeset: 348720:2f6c46b53af1
user: macallan <macallan%NetBSD.org@localhost>
date: Fri Nov 04 05:41:01 2016 +0000
description:
add plumbing to support bus_space_mmap() with:
- write combining allowed via BUS_SPACE_MAP_PREFETCHABLE
- byte order translation via BUS_SPACE_MAP_LITTLE
diffstat:
sys/arch/sparc64/include/bus_defs.h | 3 ++-
sys/arch/sparc64/include/pmap.h | 5 +++--
sys/arch/sparc64/include/pte.h | 17 +++++++++--------
sys/arch/sparc64/sparc64/machdep.c | 12 +++++++++---
sys/arch/sparc64/sparc64/pmap.c | 27 +++++++++++++++++----------
5 files changed, 40 insertions(+), 24 deletions(-)
diffs (220 lines):
diff -r c2606767e78b -r 2f6c46b53af1 sys/arch/sparc64/include/bus_defs.h
--- a/sys/arch/sparc64/include/bus_defs.h Fri Nov 04 00:19:32 2016 +0000
+++ b/sys/arch/sparc64/include/bus_defs.h Fri Nov 04 05:41:01 2016 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: bus_defs.h,v 1.3 2016/07/07 06:55:38 msaitoh Exp $ */
+/* $NetBSD: bus_defs.h,v 1.4 2016/11/04 05:41:01 macallan Exp $ */
/*-
* Copyright (c) 1996, 1997, 1998, 2001 The NetBSD Foundation, Inc.
@@ -171,6 +171,7 @@
#define BUS_SPACE_MAP_BUS2 0x0200
#define BUS_SPACE_MAP_BUS3 0x0400
#define BUS_SPACE_MAP_BUS4 0x0800
+#define BUS_SPACE_MAP_LITTLE 0x1000
/* sparc uses this, it's not supposed to do anything on sparc64 */
#define BUS_SPACE_MAP_LARGE 0
diff -r c2606767e78b -r 2f6c46b53af1 sys/arch/sparc64/include/pmap.h
--- a/sys/arch/sparc64/include/pmap.h Fri Nov 04 00:19:32 2016 +0000
+++ b/sys/arch/sparc64/include/pmap.h Fri Nov 04 05:41:01 2016 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: pmap.h,v 1.60 2015/09/06 23:48:39 nakayama Exp $ */
+/* $NetBSD: pmap.h,v 1.61 2016/11/04 05:41:01 macallan Exp $ */
/*-
* Copyright (C) 1995, 1996 Wolfgang Solfrank.
@@ -164,7 +164,7 @@
uint64_t tte;
};
-#define PMAP_NC 0x001 /* Set the E bit in the page */
+#define PMAP_NC 0x001 /* Don't cache, set the E bit in the page */
#define PMAP_NVC 0x002 /* Don't enable the virtual cache */
#define PMAP_LITTLE 0x004 /* Map in little endian mode */
/* Large page size hints --
@@ -177,6 +177,7 @@
/* If these bits are different in va's to the same PA
then there is an aliasing in the d$ */
#define VA_ALIAS_MASK (1 << 13)
+#define PMAP_WC 0x20 /* allow write combinimg */
#ifdef _KERNEL
#ifdef PMAP_COUNT_DEBUG
diff -r c2606767e78b -r 2f6c46b53af1 sys/arch/sparc64/include/pte.h
--- a/sys/arch/sparc64/include/pte.h Fri Nov 04 00:19:32 2016 +0000
+++ b/sys/arch/sparc64/include/pte.h Fri Nov 04 05:41:01 2016 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: pte.h,v 1.27 2015/04/03 10:07:57 palle Exp $ */
+/* $NetBSD: pte.h,v 1.28 2016/11/04 05:41:01 macallan Exp $ */
/*
* Copyright (c) 1996-1999 Eduardo Horvath
@@ -254,21 +254,21 @@
#define SUN4V_TLB_W 0x0000000000000040LL
#define SUN4V_TLB_G 0x0000000000000000LL
-#define SUN4U_TSB_DATA(g,sz,pa,priv,write,cache,aliased,valid,ie) \
+#define SUN4U_TSB_DATA(g,sz,pa,priv,write,cache,aliased,valid,ie,wc) \
(((valid)?SUN4U_TLB_V:0LL)|SUN4U_TLB_SZ(sz)|(((uint64_t)(pa))&SUN4U_TLB_PA_MASK)|\
-((cache)?((aliased)?SUN4U_TLB_CP:SUN4U_TLB_CACHE_MASK):SUN4U_TLB_E)|\
+((cache)?((aliased)?SUN4U_TLB_CP:SUN4U_TLB_CACHE_MASK):((wc)?0LL:SUN4U_TLB_E))|\
((priv)?SUN4U_TLB_P:0LL)|((write)?SUN4U_TLB_W:0LL)|((g)?SUN4U_TLB_G:0LL)|((ie)?SUN4U_TLB_IE:0LL))
-#define SUN4V_TSB_DATA(g,sz,pa,priv,write,cache,aliased,valid,ie) \
+#define SUN4V_TSB_DATA(g,sz,pa,priv,write,cache,aliased,valid,ie,wc) \
(((valid)?SUN4V_TLB_V:0LL)|SUN4V_TLB_SZ(sz)|\
(((u_int64_t)(pa))&SUN4V_TLB_PA_MASK)|\
-((cache)?((aliased)?SUN4V_TLB_CP:SUN4V_TLB_CACHE_MASK):SUN4V_TLB_E)|\
+((cache)?((aliased)?SUN4V_TLB_CP:SUN4V_TLB_CACHE_MASK):((wc)?0LL:SUN4V_TLB_E))|\
((priv)?SUN4V_TLB_P:0LL)|((write)?SUN4V_TLB_W:0LL)|((g)?SUN4V_TLB_G:0LL)|\
((ie)?SUN4V_TLB_IE:0LL))
-#define TSB_DATA(g,sz,pa,priv,write,cache,aliased,valid,ie) \
-(CPU_ISSUN4V ? SUN4V_TSB_DATA(g,sz,pa,priv,write,cache,aliased,valid,ie) : \
- SUN4U_TSB_DATA(g,sz,pa,priv,write,cache,aliased,valid,ie))
+#define TSB_DATA(g,sz,pa,priv,write,cache,aliased,valid,ie,wc) \
+(CPU_ISSUN4V ? SUN4V_TSB_DATA(g,sz,pa,priv,write,cache,aliased,valid,ie,wc) : \
+ SUN4U_TSB_DATA(g,sz,pa,priv,write,cache,aliased,valid,ie,wc))
#define TLB_EXEC (CPU_ISSUN4V ? SUN4V_TLB_EXEC : SUN4U_TLB_EXEC)
#define TLB_V (CPU_ISSUN4V ? SUN4V_TLB_V : SUN4U_TLB_V)
@@ -283,6 +283,7 @@
#define TLB_EXEC_ONLY (CPU_ISSUN4V ? SUN4V_TLB_EXEC_ONLY : SUN4U_TLB_EXEC_ONLY)
#define TLB_L (CPU_ISSUN4V ? 0 : SUN4U_TLB_L)
#define TLB_CV (CPU_ISSUN4V ? SUN4V_TLB_CV : SUN4U_TLB_CV)
+#define TLB_IE (CPU_ISSUN4V ? SUN4V_TLB_IE : SUN4U_TLB_IE)
#define MMU_CACHE_VIRT 0x3
#define MMU_CACHE_PHYS 0x2
diff -r c2606767e78b -r 2f6c46b53af1 sys/arch/sparc64/sparc64/machdep.c
--- a/sys/arch/sparc64/sparc64/machdep.c Fri Nov 04 00:19:32 2016 +0000
+++ b/sys/arch/sparc64/sparc64/machdep.c Fri Nov 04 05:41:01 2016 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: machdep.c,v 1.285 2016/07/07 06:55:38 msaitoh Exp $ */
+/* $NetBSD: machdep.c,v 1.286 2016/11/04 05:41:01 macallan Exp $ */
/*-
* Copyright (c) 1996, 1997, 1998 The NetBSD Foundation, Inc.
@@ -71,7 +71,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.285 2016/07/07 06:55:38 msaitoh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.286 2016/11/04 05:41:01 macallan Exp $");
#include "opt_ddb.h"
#include "opt_multiprocessor.h"
@@ -2357,8 +2357,14 @@
sparc_bus_mmap(bus_space_tag_t t, bus_addr_t paddr, off_t off, int prot,
int flags)
{
+ paddr_t pa;
/* Devices are un-cached... although the driver should do that */
- return ((paddr+off)|PMAP_NC);
+ pa = (paddr + off) | PMAP_NC;
+ if (flags & BUS_SPACE_MAP_LITTLE)
+ pa |= PMAP_LITTLE;
+ if (flags & BUS_SPACE_MAP_PREFETCHABLE)
+ pa |= PMAP_WC;
+ return pa;
}
diff -r c2606767e78b -r 2f6c46b53af1 sys/arch/sparc64/sparc64/pmap.c
--- a/sys/arch/sparc64/sparc64/pmap.c Fri Nov 04 00:19:32 2016 +0000
+++ b/sys/arch/sparc64/sparc64/pmap.c Fri Nov 04 05:41:01 2016 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: pmap.c,v 1.303 2016/07/07 06:55:38 msaitoh Exp $ */
+/* $NetBSD: pmap.c,v 1.304 2016/11/04 05:41:01 macallan Exp $ */
/*
*
* Copyright (C) 1996-1999 Eduardo Horvath.
@@ -26,7 +26,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.303 2016/07/07 06:55:38 msaitoh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.304 2016/11/04 05:41:01 macallan Exp $");
#undef NO_VCACHE /* Don't forget the locked TLB in dostart */
#define HWREF
@@ -560,7 +560,8 @@
1, /* cache */
1, /* aliased */
1, /* valid */
- 0 /* ie */);
+ 0, /* ie */
+ 0 /* wc */);
tp[i].data |= TLB_L | TLB_CV;
if (i >= kernel_itlb_slots) {
@@ -1076,7 +1077,8 @@
1 /* Cacheable */,
FORCE_ALIAS /* ALIAS -- Disable D$ */,
1 /* valid */,
- 0 /* IE */);
+ 0 /* IE */,
+ 0 /* wc */);
pmap_enter_kpage(va, data);
va += PAGE_SIZE;
msgbufsiz -= PAGE_SIZE;
@@ -1137,7 +1139,8 @@
1 /* Cacheable */,
FORCE_ALIAS /* ALIAS -- Disable D$ */,
1 /* valid */,
- 0 /* IE */);
+ 0 /* ei */,
+ 0 /* WC */);
pmap_enter_kpage(vmmap, data1);
vmmap += PAGE_SIZE;
}
@@ -1179,7 +1182,8 @@
1 /* Cacheable */,
FORCE_ALIAS /* ALIAS -- Disable D$ */,
1 /* valid */,
- 0 /* IE */);
+ 0 /* IE */,
+ 0 /* wc */);
pmap_enter_kpage(vmmap, data1);
vmmap += PAGE_SIZE;
pa += PAGE_SIZE;
@@ -1366,7 +1370,8 @@
1 /* Cacheable */,
FORCE_ALIAS /* ALIAS -- Disable D$ */,
1 /* valid */,
- 0 /* IE */);
+ 0 /* IE */,
+ 0 /* wc */);
pmap_enter_kpage(va, data);
va += PAGE_SIZE;
}
@@ -1656,7 +1661,8 @@
tte.data = TSB_DATA(0, PGSZ_8K, pa, 1 /* Privileged */,
(VM_PROT_WRITE & prot),
- !(pa & PMAP_NC), pa & (PMAP_NVC), 1, 0);
+ !(pa & PMAP_NC), pa & (PMAP_NVC), 1,
+ pa & (PMAP_LITTLE), pa & PMAP_WC);
/* We don't track mod/ref here. */
if (prot & VM_PROT_WRITE)
tte.data |= TLB_REAL_W|TLB_W;
@@ -1879,7 +1885,7 @@
}
tte.data = TSB_DATA(0, size, pa, pm == pmap_kernel(),
flags & VM_PROT_WRITE, !(pa & PMAP_NC),
- uncached, 1, pa & PMAP_LITTLE);
+ uncached, 1, pa & PMAP_LITTLE, pa & PMAP_WC);
#ifdef HWREF
if (prot & VM_PROT_WRITE)
tte.data |= TLB_REAL_W;
@@ -3837,7 +3843,8 @@
1 /* Cacheable */,
FORCE_ALIAS /* ALIAS -- Disable D$ */,
1 /* valid */,
- 0 /* IE */);
+ 0 /* IE */,
+ 0 /* wc */);
hv_rc = hv_mmu_map_perm_addr(INTSTACK, data, MAP_DTLB);
if ( hv_rc != H_EOK ) {
panic("hv_mmu_map_perm_addr() failed - rc = %" PRId64 "\n",
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