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[src/trunk]: src/sys/arch Transition from __cpuset_t to kcpuset_t *. This br...
details: https://anonhg.NetBSD.org/src/rev/7c97a20bf084
branches: trunk
changeset: 338826:7c97a20bf084
user: matt <matt%NetBSD.org@localhost>
date: Wed Jun 10 22:31:00 2015 +0000
description:
Transition from __cpuset_t to kcpuset_t *. This brings the local pmap one
step closer to uvm/pmap, its eventual replacement. Tested on ERLITE MP kernel.
diffstat:
sys/arch/evbmips/cavium/machdep.c | 20 +-
sys/arch/mips/cavium/octeon_cpunode.c | 14 +-
sys/arch/mips/cavium/octeonvar.h | 4 +-
sys/arch/mips/include/cpu.h | 21 +-
sys/arch/mips/include/cpuset.h | 55 -------
sys/arch/mips/include/pmap.h | 12 +-
sys/arch/mips/include/types.h | 11 +-
sys/arch/mips/mips/cpu_subr.c | 235 ++++++++++++++++++++-------------
sys/arch/mips/mips/ipifuncs.c | 7 +-
sys/arch/mips/mips/locore_octeon.S | 21 +-
sys/arch/mips/mips/pmap.c | 59 ++++++--
sys/arch/mips/mips/pmap_tlb.c | 116 +++++++++-------
sys/arch/mips/rmi/rmixl_cpu.c | 9 +-
sys/arch/mips/rmi/rmixl_intr.c | 7 +-
14 files changed, 311 insertions(+), 280 deletions(-)
diffs (truncated from 1412 to 300 lines):
diff -r 7a77af5059c1 -r 7c97a20bf084 sys/arch/evbmips/cavium/machdep.c
--- a/sys/arch/evbmips/cavium/machdep.c Wed Jun 10 16:32:42 2015 +0000
+++ b/sys/arch/evbmips/cavium/machdep.c Wed Jun 10 22:31:00 2015 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: machdep.c,v 1.4 2015/06/04 05:21:09 matt Exp $ */
+/* $NetBSD: machdep.c,v 1.5 2015/06/10 22:31:00 matt Exp $ */
/*
* Copyright 2001, 2002 Wasabi Systems, Inc.
@@ -111,8 +111,10 @@
* from: Utah Hdr: machdep.c 1.63 91/04/24
*/
+#include "opt_multiprocessor.h"
+
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.4 2015/06/04 05:21:09 matt Exp $");
+__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.5 2015/06/10 22:31:00 matt Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -172,8 +174,6 @@
phys_ram_seg_t mem_clusters[VM_PHYSSEG_MAX];
int mem_cluster_cnt;
-
-void configure(void);
void mach_init(uint64_t, uint64_t, uint64_t, uint64_t);
struct octeon_config octeon_configuration;
@@ -233,6 +233,7 @@
mips_init_lwp0_uarea();
boothowto = RB_AUTOBOOT;
+ boothowto |= AB_VERBOSE;
#if defined(DDB)
if (boothowto & RB_KDB)
@@ -266,7 +267,7 @@
{
/* Make sure exception base at 0 (MIPS_COP_0_EBASE) */
- asm volatile("mtc0 %0, $15, 1" : : "r"(0x80000000) );
+ __asm __volatile("mtc0 %0, $15, 1" : : "r"(0x80000000) );
/*
* Set up the exception vectors and CPU-specific function
@@ -275,11 +276,7 @@
* first printf() after that is called).
* Also clears the I+D caches.
*/
-#if MULTIPROCESSOR
mips_vector_init(NULL, true);
-#else
- mips_vector_init(NULL, false);
-#endif
}
void
@@ -380,6 +377,11 @@
void
cpu_startup(void)
{
+#ifdef MULTIPROCESSOR
+ // Create a kcpuset so we can see on which CPUs the kernel was started.
+ kcpuset_create(&cpus_booted, true);
+#endif
+
/*
* Do the common startup items.
*/
diff -r 7a77af5059c1 -r 7c97a20bf084 sys/arch/mips/cavium/octeon_cpunode.c
--- a/sys/arch/mips/cavium/octeon_cpunode.c Wed Jun 10 16:32:42 2015 +0000
+++ b/sys/arch/mips/cavium/octeon_cpunode.c Wed Jun 10 22:31:00 2015 +0000
@@ -40,6 +40,7 @@
#include <sys/device.h>
#include <sys/lwp.h>
#include <sys/cpu.h>
+#include <sys/atomic.h>
#include <sys/wdog.h>
#include <uvm/uvm.h>
@@ -47,7 +48,6 @@
#include <dev/sysmon/sysmonvar.h>
#include <mips/cache.h>
-#include <mips/cpuset.h>
#include <mips/mips_opcode.h>
#include <mips/mips3_clock.h>
@@ -78,7 +78,7 @@
CFATTACH_DECL_NEW(cpu_cpunode, 0,
cpu_cpunode_match, cpu_cpunode_attach, NULL, NULL);
-volatile __cpuset_t cpus_booted = 1;
+kcpuset_t *cpus_booted;
void octeon_reset_vector(void);
@@ -123,7 +123,9 @@
if (cvmctl & CP0_CVMCTL_REPUN)
aprint_normal(", unaligned-access ok");
#ifdef MULTIPROCESSOR
- aprint_normal(", booted %#" PRIx64, cpus_booted);
+ uint32_t booted[1];
+ kcpuset_export_u32(cpus_booted, booted, sizeof(booted));
+ aprint_normal(", booted %#" PRIx32, booted[0]);
#endif
aprint_normal("\n");
@@ -290,7 +292,7 @@
}
#ifdef MULTIPROCESSOR
KASSERTMSG(cpunum == 1, "cpunum %d", cpunum);
- if (!CPUSET_HAS_P(cpus_booted, cpunum)) {
+ if (!kcpuset_isset(cpus_booted, cpunum)) {
aprint_naive(" disabled\n");
aprint_normal(" disabled (unresponsive)\n");
return;
@@ -303,10 +305,10 @@
cpu_cpunode_attach_common(self, ci);
KASSERT(ci->ci_data.cpu_idlelwp != NULL);
- for (int i = 0; i < 100 && !CPUSET_HAS_P(cpus_hatched, cpunum); i++) {
+ for (int i = 0; i < 100 && !kcpuset_isset(cpus_hatched, cpunum); i++) {
delay(10000);
}
- if (!CPUSET_HAS_P(cpus_hatched, cpunum)) {
+ if (!kcpuset_isset(cpus_hatched, cpunum)) {
#ifdef DDB
aprint_verbose_dev(self, "hatch failed ci=%p flags=%#"PRIx64"\n", ci, ci->ci_flags);
cpu_Debugger();
diff -r 7a77af5059c1 -r 7c97a20bf084 sys/arch/mips/cavium/octeonvar.h
--- a/sys/arch/mips/cavium/octeonvar.h Wed Jun 10 16:32:42 2015 +0000
+++ b/sys/arch/mips/cavium/octeonvar.h Wed Jun 10 22:31:00 2015 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: octeonvar.h,v 1.3 2015/06/06 20:52:16 matt Exp $ */
+/* $NetBSD: octeonvar.h,v 1.4 2015/06/10 22:31:00 matt Exp $ */
/*-
* Copyright (c) 2001 The NetBSD Foundation, Inc.
@@ -34,6 +34,7 @@
#include <sys/bus.h>
#include <sys/evcnt.h>
+#include <sys/kcpuset.h>
#include <mips/locore.h>
#include <dev/pci/pcivar.h>
@@ -224,6 +225,7 @@
#ifdef _KERNEL
extern struct octeon_config octeon_configuration;
#ifdef MULTIPROCESSOR
+extern kcpuset_t *cpus_booted;
extern struct cpu_softc octeon_cpu1_softc;
#endif
diff -r 7a77af5059c1 -r 7c97a20bf084 sys/arch/mips/include/cpu.h
--- a/sys/arch/mips/include/cpu.h Wed Jun 10 16:32:42 2015 +0000
+++ b/sys/arch/mips/include/cpu.h Wed Jun 10 22:31:00 2015 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: cpu.h,v 1.115 2015/06/07 06:07:49 matt Exp $ */
+/* $NetBSD: cpu.h,v 1.116 2015/06/10 22:31:00 matt Exp $ */
/*-
* Copyright (c) 1992, 1993
@@ -55,6 +55,7 @@
#include <sys/cpu_data.h>
#include <sys/device_if.h>
#include <sys/evcnt.h>
+#include <sys/kcpuset.h>
typedef struct cpu_watchpoint {
register_t cw_addr;
@@ -460,9 +461,9 @@
void cpu_broadcast_ipi(int);
/*
- * Send an inter-processor interupt to CPUs in cpuset (excludes curcpu())
+ * Send an inter-processor interupt to CPUs in kcpuset (excludes curcpu())
*/
-void cpu_multicast_ipi(__cpuset_t, int);
+void cpu_multicast_ipi(const kcpuset_t *, int);
/*
* Send an inter-processor interupt to another CPU.
@@ -560,16 +561,16 @@
void cpu_halt_others(void);
void cpu_pause(struct reg *);
void cpu_pause_others(void);
-void cpu_resume(int);
+void cpu_resume(cpuid_t);
void cpu_resume_others(void);
-int cpu_is_paused(int);
+bool cpu_is_paused(cpuid_t);
void cpu_debug_dump(void);
-extern volatile __cpuset_t cpus_running;
-extern volatile __cpuset_t cpus_hatched;
-extern volatile __cpuset_t cpus_paused;
-extern volatile __cpuset_t cpus_resumed;
-extern volatile __cpuset_t cpus_halted;
+extern kcpuset_t *cpus_running;
+extern kcpuset_t *cpus_hatched;
+extern kcpuset_t *cpus_paused;
+extern kcpuset_t *cpus_resumed;
+extern kcpuset_t *cpus_halted;
#endif
/* copy.S */
diff -r 7a77af5059c1 -r 7c97a20bf084 sys/arch/mips/include/cpuset.h
--- a/sys/arch/mips/include/cpuset.h Wed Jun 10 16:32:42 2015 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,55 +0,0 @@
-/* $NetBSD: cpuset.h,v 1.3 2015/03/29 12:00:02 macallan Exp $ */
-
-/*-
- * Copyright (c) 2004 The NetBSD Foundation, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
- * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
- * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-
-#ifndef _MIPS_CPUSET_H_
-#define _MIPS_CPUSET_H_
-
-#include <sys/atomic.h>
-
-#define CPUSET_SINGLE(cpu) ((__cpuset_t)1 << (cpu))
-
-#if defined(__mips_o32)
-#define CPUSET_ADD(set, cpu) atomic_or_32(&(set), CPUSET_SINGLE(cpu))
-#define CPUSET_DEL(set, cpu) atomic_and_32(&(set), ~CPUSET_SINGLE(cpu))
-#define CPUSET_SUB(set1, set2) atomic_and_32(&(set1), ~(set2))
-#else
-#define CPUSET_ADD(set, cpu) atomic_or_64(&(set), CPUSET_SINGLE(cpu))
-#define CPUSET_DEL(set, cpu) atomic_and_64(&(set), ~CPUSET_SINGLE(cpu))
-#define CPUSET_SUB(set1, set2) atomic_and_64(&(set1), ~(set2))
-#endif
-#define CPUSET_EXCEPT(set, cpu) ((set) & ~CPUSET_SINGLE(cpu))
-
-#define CPUSET_HAS_P(set, cpu) ((set) & CPUSET_SINGLE(cpu))
-#define CPUSET_NEXT(set) (ffs(set) - 1)
-
-#define CPUSET_EMPTY_P(set) ((set) == (__cpuset_t)0)
-#define CPUSET_EQUAL_P(set1, set2) ((set1) == (set2))
-#define CPUSET_CLEAR(set) ((set) = (__cpuset_t)0)
-#define CPUSET_ASSIGN(set1, set2) ((set1) = (set2))
-
-#endif /* _MIPS_CPUSET_H_ */
diff -r 7a77af5059c1 -r 7c97a20bf084 sys/arch/mips/include/pmap.h
--- a/sys/arch/mips/include/pmap.h Wed Jun 10 16:32:42 2015 +0000
+++ b/sys/arch/mips/include/pmap.h Wed Jun 10 22:31:00 2015 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: pmap.h,v 1.64 2015/06/07 06:07:49 matt Exp $ */
+/* $NetBSD: pmap.h,v 1.65 2015/06/10 22:31:00 matt Exp $ */
/*
* Copyright (c) 1992, 1993
@@ -79,9 +79,9 @@
#endif
#include <sys/evcnt.h>
+#include <sys/kcpuset.h>
#include <mips/cpuregs.h> /* for KSEG0 below */
-//#include <mips/pte.h>
/*
* The user address space is 2Gb (0x0 - 0x80000000).
@@ -174,8 +174,8 @@
*/
struct pmap {
#ifdef MULTIPROCESSOR
- volatile uint32_t pm_active; /* pmap was active on ... */
- volatile uint32_t pm_onproc; /* pmap is active on ... */
+ kcpuset_t *pm_active; /* pmap was active on ... */
+ kcpuset_t *pm_onproc; /* pmap is active on ... */
volatile u_int pm_shootdown_pending;
#endif
union segtab *pm_segtab; /* pointers to pages of PTEs */
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