[src/trunk]: src/sys/arch/arm/nvidia Re-enable EHCIF_ETTF and provide a sc_ve...

[skrll <skrll%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/e24815fb6ae4
branches:  trunk
changeset: 338318:e24815fb6ae4
user:      skrll <skrll%NetBSD.org@localhost>
date:      Mon May 18 09:56:43 2015 +0000

description:
Re-enable EHCIF_ETTF and provide a sc_vendor_port_status to get port
speed from HOSTSC1

My FS usb stick works with this change.

diffstat:

 sys/arch/arm/nvidia/tegra_ehci.c    |  37 ++++++++++++++++++++++++++++++++++---
 sys/arch/arm/nvidia/tegra_ehcireg.h |  16 +++++++++++++++-
 2 files changed, 49 insertions(+), 4 deletions(-)

diffs (99 lines):

diff -r c1fdc0444efb -r e24815fb6ae4 sys/arch/arm/nvidia/tegra_ehci.c
--- a/sys/arch/arm/nvidia/tegra_ehci.c  Mon May 18 08:33:29 2015 +0000
+++ b/sys/arch/arm/nvidia/tegra_ehci.c  Mon May 18 09:56:43 2015 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: tegra_ehci.c,v 1.4 2015/05/09 18:56:51 jmcneill Exp $ */
+/* $NetBSD: tegra_ehci.c,v 1.5 2015/05/18 09:56:43 skrll Exp $ */
 
 /*-
  * Copyright (c) 2015 Jared D. McNeill <jmcneill%invisible.ca@localhost>
@@ -29,7 +29,7 @@
 #include "locators.h"
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: tegra_ehci.c,v 1.4 2015/05/09 18:56:51 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: tegra_ehci.c,v 1.5 2015/05/18 09:56:43 skrll Exp $");
 
 #include <sys/param.h>
 #include <sys/bus.h>
@@ -66,6 +66,8 @@
 };
 
 static void    tegra_ehci_utmip_init(struct tegra_ehci_softc *);
+static int     tegra_ehci_port_status(struct ehci_softc *sc, uint32_t v,
+                   int i);
 
 CFATTACH_DECL2_NEW(tegra_ehci, sizeof(struct tegra_ehci_softc),
        tegra_ehci_match, tegra_ehci_attach, NULL,
@@ -96,7 +98,9 @@
        sc->sc.sc_bus.hci_private = &sc->sc;
        sc->sc.sc_bus.dmatag = tio->tio_dmat;
        sc->sc.sc_bus.usbrev = USBREV_2_0;
-       sc->sc.sc_flags = 0;    /* XXX EHCIF_ETTF */
+       sc->sc.sc_vendor_port_status = tegra_ehci_port_status;
+       sc->sc.sc_ncomp = 0;
+       sc->sc.sc_flags = EHCIF_ETTF;
        sc->sc.sc_id_vendor = 0x10de;
        strlcpy(sc->sc.sc_vendor, "Tegra", sizeof(sc->sc.sc_vendor));
        sc->sc.sc_size = loc->loc_size;
@@ -311,3 +315,30 @@
                    0, TEGRA_EHCI_UTMIP_BIAS_CFG1_PDTRK_POWERDOWN);
        }
 }
+
+
+static int
+tegra_ehci_port_status(struct ehci_softc *sc, uint32_t v, int i)
+{
+       bus_space_tag_t iot = sc->iot;
+       bus_space_handle_t ioh = sc->ioh;
+
+       i &= ~UPS_HIGH_SPEED;
+
+       uint32_t val = bus_space_read_4(iot, ioh,
+           TEGRA_EHCI_HOSTPC1_DEVLC_REG);
+
+       switch (__SHIFTOUT(val, TEGRA_EHCI_HOSTPC1_DEVLC_PSPD)) {
+       case TEGRA_EHCI_HOSTPC1_DEVLC_PSPD_FS:
+               i |= UPS_FULL_SPEED;
+               break;
+       case TEGRA_EHCI_HOSTPC1_DEVLC_PSPD_LS:
+               i |= UPS_LOW_SPEED;
+               break;
+       case TEGRA_EHCI_HOSTPC1_DEVLC_PSPD_HS:
+       default:
+               i |= UPS_HIGH_SPEED;
+               break;
+       }
+       return i;
+}
diff -r c1fdc0444efb -r e24815fb6ae4 sys/arch/arm/nvidia/tegra_ehcireg.h
--- a/sys/arch/arm/nvidia/tegra_ehcireg.h       Mon May 18 08:33:29 2015 +0000
+++ b/sys/arch/arm/nvidia/tegra_ehcireg.h       Mon May 18 09:56:43 2015 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: tegra_ehcireg.h,v 1.1 2015/05/09 18:56:51 jmcneill Exp $ */
+/* $NetBSD: tegra_ehcireg.h,v 1.2 2015/05/18 09:56:43 skrll Exp $ */
 
 /*-
  * Copyright (c) 2015 Jared D. McNeill <jmcneill%invisible.ca@localhost>
@@ -42,6 +42,20 @@
 #define TEGRA_EHCI_HOSTPC1_DEVLC_PTS_ULPI      2
 #define TEGRA_EHCI_HOSTPC1_DEVLC_PTS_ICUSB_SER 3
 #define TEGRA_EHCI_HOSTPC1_DEVLC_STS           __BIT(28)
+#define TEGRA_EHCI_HOSTPC1_DEVLC_PTW           __BIT(27)
+#define TEGRA_EHCI_HOSTPC1_DEVLC_PSPD          __BITS(26,25)
+#define TEGRA_EHCI_HOSTPC1_DEVLC_PSPD_FS       0
+#define TEGRA_EHCI_HOSTPC1_DEVLC_PSPD_LS       1
+#define TEGRA_EHCI_HOSTPC1_DEVLC_PSPD_HS       2
+#define TEGRA_EHCI_HOSTPC1_DEVLC_ALPD          __BIT(24)
+#define TEGRA_EHCI_HOSTPC1_DEVLC_PFSC          __BIT(23)
+#define TEGRA_EHCI_HOSTPC1_DEVLC_PHCD          __BIT(22)
+#define TEGRA_EHCI_HOSTPC1_DEVLC_H_LPMX                __BITS(21,20)
+#define TEGRA_EHCI_HOSTPC1_DEVLC_H_EPLPM       __BITS(19,16)
+#define TEGRA_EHCI_HOSTPC1_DEVLC_H_LPMFRM      __BITS(15,12)
+#define TEGRA_EHCI_HOSTPC1_DEVLC_D_ASUS                __BIT(17)
+#define TEGRA_EHCI_HOSTPC1_DEVLC_D_STL         __BIT(16)
+#define TEGRA_EHCI_HOSTPC1_DEVLC_BA            __BITS(11,1)
 
 #define TEGRA_EHCI_USBMODE_REG                 0x1f8
 #define TEGRA_EHCI_USBMODE_CM                  __BITS(1,0)