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[src/trunk]: src/sys/dev/pci fix 32 bit compilation



details:   https://anonhg.NetBSD.org/src/rev/fb21a40fdb95
branches:  trunk
changeset: 342708:fb21a40fdb95
user:      christos <christos%NetBSD.org@localhost>
date:      Wed Jan 06 03:53:29 2016 +0000

description:
fix 32 bit compilation

diffstat:

 sys/dev/pci/ismt.c |  14 ++++++++------
 1 files changed, 8 insertions(+), 6 deletions(-)

diffs (46 lines):

diff -r 2cc5bda93c00 -r fb21a40fdb95 sys/dev/pci/ismt.c
--- a/sys/dev/pci/ismt.c        Wed Jan 06 01:54:53 2016 +0000
+++ b/sys/dev/pci/ismt.c        Wed Jan 06 03:53:29 2016 +0000
@@ -60,7 +60,7 @@
 #if 0
 __FBSDID("$FreeBSD: head/sys/dev/ismt/ismt.c 266474 2014-05-20 19:55:06Z jimharris $");
 #endif
-__KERNEL_RCSID(0, "$NetBSD: ismt.c,v 1.1 2016/01/05 11:24:43 msaitoh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: ismt.c,v 1.2 2016/01/06 03:53:29 christos Exp $");
 
 #include <sys/param.h>
 #include <sys/systm.h>
@@ -160,6 +160,9 @@
 #define ISMT_DEBUG(...)
 #endif
 
+#define ISMT_LOW(a)    ((a) & 0xFFFFFFFFULL)
+#define ISMT_HIGH(a)   (((uint64_t)(a) >> 32) & 0xFFFFFFFFFULL)
+
 /* iSMT Hardware Descriptor */
 struct ismt_desc {
        uint8_t tgtaddr_rw;     /* target address & r/w bit */
@@ -364,9 +367,8 @@
                desc->control |= ISMT_DESC_INT;
 
        desc->tgtaddr_rw = ISMT_DESC_ADDR_RW(slave, is_read);
-       desc->dptr_low = (sc->dma_buffer_dma_map->dm_segs[0].ds_addr
-           & 0xFFFFFFFFLL);
-       desc->dptr_high = (sc->dma_buffer_dma_map->dm_segs[0].ds_addr >> 32);
+       desc->dptr_low = ISMT_LOW(sc->dma_buffer_dma_map->dm_segs[0].ds_addr);
+       desc->dptr_high = ISMT_HIGH(sc->dma_buffer_dma_map->dm_segs[0].ds_addr);
 
        bus_dmamap_sync(sc->desc_dma_tag, sc->desc_dma_map,
            desc - &sc->desc[0], sizeof(struct ismt_desc),
@@ -736,9 +738,9 @@
            NULL, 0);
 
        bus_space_write_4(sc->mmio_tag, sc->mmio_handle, ISMT_MSTR_MDBA,
-           (sc->desc_dma_map->dm_segs[0].ds_addr & 0xFFFFFFFFLL));
+           ISMT_LOW(sc->desc_dma_map->dm_segs[0].ds_addr));
        bus_space_write_4(sc->mmio_tag, sc->mmio_handle, ISMT_MSTR_MDBA + 4,
-           (sc->desc_dma_map->dm_segs[0].ds_addr >> 32));
+           ISMT_HIGH(sc->desc_dma_map->dm_segs[0].ds_addr));
 
        /* initialize the Master Control Register (MCTRL) */
        bus_space_write_4(sc->mmio_tag, sc->mmio_handle, ISMT_MSTR_MCTRL,



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