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[src/trunk]: src/sys KNF a little.
details: https://anonhg.NetBSD.org/src/rev/423e57eadcd9
branches: trunk
changeset: 346936:423e57eadcd9
user: maxv <maxv%NetBSD.org@localhost>
date: Sun Aug 07 10:07:58 2016 +0000
description:
KNF a little.
diffstat:
sys/arch/amd64/amd64/vector.S | 109 ++++++++++++++++++------------------
sys/arch/i386/i386/vector.S | 125 ++++++++++++++++++++---------------------
sys/uvm/uvm_mmap.c | 108 +++++++++++++++++-------------------
3 files changed, 168 insertions(+), 174 deletions(-)
diffs (truncated from 868 to 300 lines):
diff -r abd8a2276a99 -r 423e57eadcd9 sys/arch/amd64/amd64/vector.S
--- a/sys/arch/amd64/amd64/vector.S Sun Aug 07 09:55:18 2016 +0000
+++ b/sys/arch/amd64/amd64/vector.S Sun Aug 07 10:07:58 2016 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: vector.S,v 1.45 2015/11/22 13:41:24 maxv Exp $ */
+/* $NetBSD: vector.S,v 1.46 2016/08/07 10:17:32 maxv Exp $ */
/*-
* Copyright (c) 1998, 2007, 2008 The NetBSD Foundation, Inc.
@@ -107,7 +107,6 @@
* If the interrupt frame is made more flexible, INTR can push %eax first and
* decide the ipending case with less overhead, e.g., by avoiding loading the
* segment registers.
- *
*/
/* XXX See comment in locore.s */
@@ -121,16 +120,16 @@
#ifdef MULTIPROCESSOR
IDTVEC(recurse_lapic_ipi)
INTR_RECURSE_HWFRAME
- pushq $0
+ pushq $0
pushq $T_ASTFLT
- INTRENTRY
+ INTRENTRY
jmp 1f
IDTVEC_END(recurse_lapic_ipi)
IDTVEC(intr_lapic_ipi)
- pushq $0
+ pushq $0
pushq $T_ASTFLT
- INTRENTRY
+ INTRENTRY
movl $0,_C_LABEL(local_apic)+LAPIC_EOI
movl CPUVAR(ILEVEL),%ebx
cmpl $IPL_HIGH,%ebx
@@ -166,22 +165,22 @@
IDTVEC_END(intrddb)
#endif /* DDB */
#endif /* MULTIPROCESSOR */
-
+
/*
* Interrupt from the local APIC timer.
*/
IDTVEC(recurse_lapic_ltimer)
INTR_RECURSE_HWFRAME
- pushq $0
+ pushq $0
pushq $T_ASTFLT
- INTRENTRY
+ INTRENTRY
jmp 1f
IDTVEC_END(recurse_lapic_ltimer)
IDTVEC(intr_lapic_ltimer)
- pushq $0
+ pushq $0
pushq $T_ASTFLT
- INTRENTRY
+ INTRENTRY
movl $0,_C_LABEL(local_apic)+LAPIC_EOI
movl CPUVAR(ILEVEL),%ebx
cmpl $IPL_CLOCK,%ebx
@@ -211,7 +210,7 @@
pushq $0
pushq $T_ASTFLT
INTRENTRY
- movl $0, _C_LABEL(local_apic)+LAPIC_EOI
+ movl $0,_C_LABEL(local_apic)+LAPIC_EOI
callq _C_LABEL(pmap_tlb_intr)
INTRFASTEXIT
IDTVEC_END(intr_lapic_tlb)
@@ -236,14 +235,14 @@
IDTVEC(resume_ ## name ## num) \
movq $IREENT_MAGIC,TF_ERR(%rsp) ;\
movl %ebx,%r13d ;\
- movq CPUVAR(ISOURCES) + (num) * 8, %r14 ;\
+ movq CPUVAR(ISOURCES) + (num) * 8,%r14 ;\
movl IS_MAXLEVEL(%r14),%ebx ;\
jmp 1f ;\
IDTVEC(intr_ ## name ## num) ;\
pushq $0 /* dummy error code */ ;\
pushq $T_ASTFLT /* trap # for doing ASTs */ ;\
INTRENTRY ;\
- movq CPUVAR(ISOURCES) + (num) * 8, %r14 ;\
+ movq CPUVAR(ISOURCES) + (num) * 8,%r14 ;\
mask(num) /* mask it in hardware */ ;\
early_ack(num) /* and allow other intrs */ ;\
testq %r14,%r14 ;\
@@ -279,14 +278,14 @@
jmp _C_LABEL(Xdoreti) /* lower spl and do ASTs */ ;\
7: \
cli ;\
- orl $(1 << num),CPUVAR(IPENDING) ;\
+ orl $(1 << num),CPUVAR(IPENDING) ;\
level_mask(num) ;\
late_ack(num) ;\
sti ;\
jmp _C_LABEL(Xdoreti) /* lower spl and do ASTs */ ;\
10: \
cli ;\
- orl $(1 << num),CPUVAR(IPENDING) ;\
+ orl $(1 << num),CPUVAR(IPENDING) ;\
level_mask(num) ;\
late_ack(num) ;\
INTRFASTEXIT ;\
@@ -581,39 +580,39 @@
/* Resume/recurse procedures for spl() */
#define XENINTRSTUB(name, num, early_ack, late_ack, mask, unmask, level_mask) \
IDTVEC(recurse_ ## name ## num) ;\
- INTR_RECURSE_HWFRAME ;\
- subq $8,%rsp ;\
- pushq $T_ASTFLT /* trap # for doing ASTs */ ;\
- INTRENTRY ;\
+ INTR_RECURSE_HWFRAME ;\
+ subq $8,%rsp ;\
+ pushq $T_ASTFLT /* trap # for doing ASTs */ ;\
+ INTRENTRY ;\
IDTVEC(resume_ ## name ## num) \
- movq $IREENT_MAGIC,TF_ERR(%rsp) ;\
- movl %ebx,%r13d ;\
- movq CPUVAR(ISOURCES) + (num) * 8, %r14 ;\
+ movq $IREENT_MAGIC,TF_ERR(%rsp) ;\
+ movl %ebx,%r13d ;\
+ movq CPUVAR(ISOURCES) + (num) * 8,%r14 ;\
1: \
- pushq %r13 ;\
- movl $num,CPUVAR(ILEVEL) ;\
- STI(si) ;\
- incl CPUVAR(IDEPTH) ;\
- movq IS_HANDLERS(%r14),%rbx ;\
+ pushq %r13 ;\
+ movl $num,CPUVAR(ILEVEL) ;\
+ STI(si) ;\
+ incl CPUVAR(IDEPTH) ;\
+ movq IS_HANDLERS(%r14),%rbx ;\
6: \
- movq IH_ARG(%rbx),%rdi ;\
- movq %rsp,%rsi ;\
- call *IH_FUN(%rbx) /* call it */ ;\
- movq IH_IPL_NEXT(%rbx),%rbx /* next handler in chain */ ;\
- testq %rbx,%rbx ;\
- jnz 6b ;\
+ movq IH_ARG(%rbx),%rdi ;\
+ movq %rsp,%rsi ;\
+ call *IH_FUN(%rbx) /* call it */ ;\
+ movq IH_IPL_NEXT(%rbx),%rbx /* next handler in chain */ ;\
+ testq %rbx,%rbx ;\
+ jnz 6b ;\
5: \
- CLI(si) ;\
- unmask(num) /* unmask it in hardware */ ;\
- late_ack(num) ;\
- STI(si) ;\
- jmp _C_LABEL(Xdoreti) /* lower spl and do ASTs */ ;\
-
-# The unmask func for Xen events
+ CLI(si) ;\
+ unmask(num) /* unmask it in hardware */ ;\
+ late_ack(num) ;\
+ STI(si) ;\
+ jmp _C_LABEL(Xdoreti) /* lower spl and do ASTs */ ;\
+
+/* The unmask func for Xen events */
#define hypervisor_asm_unmask(num) \
- movq $num, %rdi ;\
- call _C_LABEL(hypervisor_enable_ipl)
-
+ movq $num,%rdi ;\
+ call _C_LABEL(hypervisor_enable_ipl)
+
XENINTRSTUB(xenev,0,voidop,voidop,voidop,hypervisor_asm_unmask,voidop)
XENINTRSTUB(xenev,1,voidop,voidop,voidop,hypervisor_asm_unmask,voidop)
XENINTRSTUB(xenev,2,voidop,voidop,voidop,hypervisor_asm_unmask,voidop)
@@ -682,19 +681,21 @@
.quad _C_LABEL(Xrecurse_xenev31), _C_LABEL(Xresume_xenev31)
END(xenev_stubs)
-# Xen callbacks
+/*
+ * Xen callbacks
+ */
-# Hypervisor callback
+/* Hypervisor callback */
NENTRY(hypervisor_callback)
movq (%rsp),%rcx
movq 8(%rsp),%r11
addq $16,%rsp
- pushq $0 # Dummy error code
+ pushq $0 /* Dummy error code */
pushq $T_ASTFLT
INTRENTRY
- # sti??
- movq %rsp, %rdi
- subq $8, %rdi; /* don't forget if_ppl */
+ /* sti?? */
+ movq %rsp,%rdi
+ subq $8,%rdi; /* don't forget if_ppl */
call do_hypervisor_callback
testb $SEL_RPL,TF_CS(%rsp)
jnz doreti_checkast
@@ -702,7 +703,7 @@
INTRFASTEXIT
END(hypervisor_callback)
-# Panic?
+/* Panic? */
NENTRY(failsafe_callback)
movq (%rsp),%rcx
movq 8(%rsp),%r11
@@ -710,11 +711,11 @@
pushq $0
pushq $T_ASTFLT
INTRENTRY
- movq %rsp, %rdi
- subq $8, %rdi; /* don't forget if_ppl */
+ movq %rsp,%rdi
+ subq $8,%rdi; /* don't forget if_ppl */
call xen_failsafe_handler
INTRFASTEXIT
-# jmp HYPERVISOR_iret
+/* jmp HYPERVISOR_iret */
END(failsafe_callback)
#endif /* !XEN */
diff -r abd8a2276a99 -r 423e57eadcd9 sys/arch/i386/i386/vector.S
--- a/sys/arch/i386/i386/vector.S Sun Aug 07 09:55:18 2016 +0000
+++ b/sys/arch/i386/i386/vector.S Sun Aug 07 10:07:58 2016 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: vector.S,v 1.64 2014/01/26 19:16:17 dsl Exp $ */
+/* $NetBSD: vector.S,v 1.65 2016/08/07 10:17:32 maxv Exp $ */
/*
* Copyright 2002 (c) Wasabi Systems, Inc.
@@ -65,7 +65,7 @@
*/
#include <machine/asm.h>
-__KERNEL_RCSID(0, "$NetBSD: vector.S,v 1.64 2014/01/26 19:16:17 dsl Exp $");
+__KERNEL_RCSID(0, "$NetBSD: vector.S,v 1.65 2016/08/07 10:17:32 maxv Exp $");
#include "opt_ddb.h"
#include "opt_multiprocessor.h"
@@ -106,7 +106,6 @@
* If the interrupt frame is made more flexible, INTR can push %eax first and
* decide the ipending case with less overhead, e.g., by avoiding loading the
* segment registers.
- *
*/
/*
@@ -132,13 +131,13 @@
.globl dtrace_invop_jump_addr
.align 4
.type dtrace_invop_jump_addr, @object
- .size dtrace_invop_jump_addr, 4
+ .size dtrace_invop_jump_addr, 4
dtrace_invop_jump_addr:
.zero 4
.globl dtrace_invop_calltrap_addr
.align 4
.type dtrace_invop_calltrap_addr, @object
- .size dtrace_invop_calltrap_addr, 4
+ .size dtrace_invop_calltrap_addr, 4
dtrace_invop_calltrap_addr:
.zero 8
.text
@@ -154,15 +153,15 @@
pushfl
pushl %cs
pushl %esi
- pushl $0
+ pushl $0
pushl $T_ASTFLT
- INTRENTRY
+ INTRENTRY
jmp 1f
IDTVEC_END(recurse_lapic_ipi)
IDTVEC(intr_lapic_ipi)
- pushl $0
+ pushl $0
pushl $T_ASTFLT
- INTRENTRY
+ INTRENTRY
movl $0,_C_LABEL(local_apic)+LAPIC_EOI
movl CPUVAR(ILEVEL),%ebx
cmpl $IPL_HIGH,%ebx
@@ -189,7 +188,7 @@
pushl $0
pushl $T_ASTFLT
INTRENTRY
- movl $0, _C_LABEL(local_apic)+LAPIC_EOI
+ movl $0,_C_LABEL(local_apic)+LAPIC_EOI
call _C_LABEL(pmap_tlb_intr)
INTRFASTEXIT
IDTVEC_END(intr_lapic_tlb)
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