[src/trunk]: src/sys/arch/mips/mips make this compile again

[macallan <macallan%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/faa65f3dea52
branches:  trunk
changeset: 346454:faa65f3dea52
user:      macallan <macallan%NetBSD.org@localhost>
date:      Wed Jul 13 21:25:15 2016 +0000

description:
make this compile again

diffstat:

 sys/arch/mips/mips/cache_r10k.c |  44 +++++++++++++++++++++++-----------------
 1 files changed, 25 insertions(+), 19 deletions(-)

diffs (93 lines):

diff -r a5241bddce91 -r faa65f3dea52 sys/arch/mips/mips/cache_r10k.c
--- a/sys/arch/mips/mips/cache_r10k.c   Wed Jul 13 16:26:26 2016 +0000
+++ b/sys/arch/mips/mips/cache_r10k.c   Wed Jul 13 21:25:15 2016 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: cache_r10k.c,v 1.7 2016/07/11 16:15:36 matt Exp $      */
+/*     $NetBSD: cache_r10k.c,v 1.8 2016/07/13 21:25:15 macallan Exp $  */
 
 /*-
  * Copyright (c) 2003 Takao Shinohara.
@@ -91,9 +91,10 @@
        __asm volatile("sync");
 
        while (va < eva) {
-               cache_op_r4k_line(va+0, CACHE_R4K_I|CACHEOP_R4K_INDEX_INV);
-               cache_op_r4k_line(va+1, CACHE_R4K_I|CACHEOP_R4K_INDEX_INV);
-               va += 64;
+               cache_op_r4k_line(va, CACHE_R4K_I|CACHEOP_R4K_INDEX_INV);
+               va++;
+               cache_op_r4k_line(va, CACHE_R4K_I|CACHEOP_R4K_INDEX_INV);
+               va += 63;
        }
 }
 
@@ -141,9 +142,10 @@
        va = trunc_line(va);
 
        while (va < eva) {
-               cache_op_r4k_line(va+0, CACHE_R4K_I|CACHEOP_R4K_INDEX_INV);
-               cache_op_r4k_line(va+1, CACHE_R4K_I|CACHEOP_R4K_INDEX_INV);
-               va += 64;
+               cache_op_r4k_line(va, CACHE_R4K_I|CACHEOP_R4K_INDEX_INV);
+               va++;
+               cache_op_r4k_line(va, CACHE_R4K_I|CACHEOP_R4K_INDEX_INV);
+               va += 63;
        }
 }
 
@@ -161,9 +163,10 @@
        vaddr_t eva = va + mci->mci_pdcache_way_size;
 
        while (va < eva) {
-               cache_op_r4k_line(va+0, CACHE_R4K_D|CACHEOP_R4K_INDEX_WB_INV);
-               cache_op_r4k_line(va+1, CACHE_R4K_D|CACHEOP_R4K_INDEX_WB_INV);
-               va += 32;
+               cache_op_r4k_line(va, CACHE_R4K_D|CACHEOP_R4K_INDEX_WB_INV);
+               va++;
+               cache_op_r4k_line(va, CACHE_R4K_D|CACHEOP_R4K_INDEX_WB_INV);
+               va += 31;
        }
 }
 
@@ -198,9 +201,10 @@
        va = trunc_line(va);
 
        while (va < eva) {
-               cache_op_r4k_line(va+0, CACHE_R4K_D|CACHEOP_R4K_INDEX_WB_INV);
-               cache_op_r4k_line(va+1, CACHE_R4K_D|CACHEOP_R4K_INDEX_WB_INV);
-               va += 32;
+               cache_op_r4k_line(va, CACHE_R4K_D|CACHEOP_R4K_INDEX_WB_INV);
+               va++;
+               cache_op_r4k_line(va, CACHE_R4K_D|CACHEOP_R4K_INDEX_WB_INV);
+               va += 31;
        }
 }
 
@@ -246,9 +250,10 @@
        vsize_t line_size = mci->mci_sdcache_line_size;
 
        while (va < eva) {
-               cache_op_r4k_line(va+0, CACHE_R4K_SD|CACHEOP_R4K_INDEX_WB_INV);
-               cache_op_r4k_line(va+1, CACHE_R4K_SD|CACHEOP_R4K_INDEX_WB_INV);
-               va += line_size;
+               cache_op_r4k_line(va, CACHE_R4K_SD|CACHEOP_R4K_INDEX_WB_INV);
+               va++;
+               cache_op_r4k_line(va, CACHE_R4K_SD|CACHEOP_R4K_INDEX_WB_INV);
+               va += line_size - 1;
        }
 }
 
@@ -286,9 +291,10 @@
        va = trunc_line(va);
 
        while (va < eva) {
-               cache_op_r4k_line(va+0, CACHE_R4K_SD|CACHEOP_R4K_INDEX_WB_INV);
-               cache_op_r4k_line(va+1, CACHE_R4K_SD|CACHEOP_R4K_INDEX_WB_INV);
-               va += line_size;
+               cache_op_r4k_line(va, CACHE_R4K_SD|CACHEOP_R4K_INDEX_WB_INV);
+               va++;
+               cache_op_r4k_line(va, CACHE_R4K_SD|CACHEOP_R4K_INDEX_WB_INV);
+               va += line_size - 1;
        }
 }