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[src/trunk]: src/lib/libc/arch/ia64/gen Add set/longjmp and friends (nearly v...



details:   https://anonhg.NetBSD.org/src/rev/a9854c345333
branches:  trunk
changeset: 337499:a9854c345333
user:      martin <martin%NetBSD.org@localhost>
date:      Fri Apr 17 12:51:05 2015 +0000

description:
Add set/longjmp and friends (nearly verbatim from FreeBSD).
Add a dummy _lwp_makecontext() function (enough to make autoconfigury
happy and gcc mknative work)

diffstat:

 lib/libc/arch/ia64/gen/Makefile.inc |    7 +-
 lib/libc/arch/ia64/gen/_lwp.c       |   68 +++++++
 lib/libc/arch/ia64/gen/_setjmp.S    |  308 ++++++++++++++++++++++++++++++++++++
 lib/libc/arch/ia64/gen/setjmp.S     |   82 +++++++++
 lib/libc/arch/ia64/gen/sigsetjmp.S  |   64 +++++++
 5 files changed, 526 insertions(+), 3 deletions(-)

diffs (truncated from 554 to 300 lines):

diff -r 76dacf8ca50c -r a9854c345333 lib/libc/arch/ia64/gen/Makefile.inc
--- a/lib/libc/arch/ia64/gen/Makefile.inc       Fri Apr 17 12:46:33 2015 +0000
+++ b/lib/libc/arch/ia64/gen/Makefile.inc       Fri Apr 17 12:51:05 2015 +0000
@@ -1,8 +1,9 @@
-#      $NetBSD: Makefile.inc,v 1.5 2012/12/27 10:41:18 martin Exp $
+#      $NetBSD: Makefile.inc,v 1.6 2015/04/17 12:51:05 martin Exp $
 
+SRCS+= _lwp.c
 SRCS+= bswap16.c bswap32.c bswap64.c
-
-SRCS+= flt_rounds.c fpgetround.c fpsetround.c fpgetmask.c fpsetmask.c
+SRCS+= setjmp.S _setjmp.S sigsetjmp.S
+SRCS+= flt_rounds.c fpgetround.c fpsetround.c fpgetmask.c fpsetmask.c
 SRCS+= isinff_ieee754.c isinfd_ieee754.c
 SRCS+= isnanf_ieee754.c isnand_ieee754.c
 SRCS+= fpclassifyf_ieee754.c fpclassifyd_ieee754.c
diff -r 76dacf8ca50c -r a9854c345333 lib/libc/arch/ia64/gen/_lwp.c
--- /dev/null   Thu Jan 01 00:00:00 1970 +0000
+++ b/lib/libc/arch/ia64/gen/_lwp.c     Fri Apr 17 12:51:05 2015 +0000
@@ -0,0 +1,68 @@
+/*     $NetBSD: _lwp.c,v 1.1 2015/04/17 12:51:05 martin Exp $  */
+
+/*-
+ * Copyright (c) 2001 The NetBSD Foundation, Inc.
+ * All rights reserved.
+ *
+ * This code is derived from software contributed to The NetBSD Foundation
+ * by Nathan J. Williams.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <sys/cdefs.h>
+#if defined(LIBC_SCCS) && !defined(lint)
+__RCSID("$NetBSD: _lwp.c,v 1.1 2015/04/17 12:51:05 martin Exp $");
+#endif /* LIBC_SCCS and not lint */
+
+#include "namespace.h"
+#include <sys/types.h>
+#include <ucontext.h>
+#include <lwp.h>
+#include <stdlib.h>
+
+void
+_lwp_makecontext(ucontext_t *u, void (*start)(void *),
+    void *arg, void *private, caddr_t stack_base, size_t stack_size)
+{
+#if 0
+       __greg_t *gr;
+
+       getcontext(u);
+       gr = u->uc_mcontext.__gregs;
+
+       u->uc_link = NULL;
+
+       u->uc_stack.ss_sp = stack_base;
+       u->uc_stack.ss_size = stack_size;
+
+       gr[_REG_PC] = (unsigned long)start;
+       gr[_REG_T12] = (unsigned long) start;
+       gr[_REG_RA] = (unsigned long) _lwp_exit;
+       gr[_REG_A0] = (unsigned long) arg;
+       gr[_REG_SP] = ((unsigned long) (stack_base + stack_size)) & ~0x7;
+       gr[_REG_S6] = 0;
+       gr[_REG_UNIQUE] = (unsigned long)private;
+
+       u->uc_flags |= _UC_TLSBASE;
+#endif
+}
diff -r 76dacf8ca50c -r a9854c345333 lib/libc/arch/ia64/gen/_setjmp.S
--- /dev/null   Thu Jan 01 00:00:00 1970 +0000
+++ b/lib/libc/arch/ia64/gen/_setjmp.S  Fri Apr 17 12:51:05 2015 +0000
@@ -0,0 +1,308 @@
+//
+// Copyright (c) 1999, 2000
+// Intel Corporation.
+// All rights reserved.
+// 
+// Redistribution and use in source and binary forms, with or without
+// modification, are permitted provided that the following conditions
+// are met:
+// 
+// 1. Redistributions of source code must retain the above copyright
+//    notice, this list of conditions and the following disclaimer.
+// 
+// 2. Redistributions in binary form must reproduce the above copyright
+//   notice, this list of conditions and the following disclaimer in the
+//    documentation and/or other materials provided with the distribution.
+// 
+// 3. All advertising materials mentioning features or use of this software
+//    must display the following acknowledgement:
+// 
+//    This product includes software developed by Intel Corporation and
+//    its contributors.
+// 
+// 4. Neither the name of Intel Corporation or its contributors may be
+//    used to endorse or promote products derived from this software
+//    without specific prior written permission.
+// 
+// THIS SOFTWARE IS PROVIDED BY INTEL CORPORATION AND CONTRIBUTORS ``AS IS''
+// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+// ARE DISCLAIMED.  IN NO EVENT SHALL INTEL CORPORATION OR CONTRIBUTORS BE
+// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
+// THE POSSIBILITY OF SUCH DAMAGE.
+// 
+//
+
+//
+// Module Name:
+//
+//  setjmp.s
+//
+// Abstract:
+//
+//  Contains an implementation of setjmp and longjmp for the
+//  IA-64 architecture.
+
+    .file   "setjmp.s"
+
+#include <machine/asm.h>
+RCSID("$NetBSD: _setjmp.S,v 1.1 2015/04/17 12:51:05 martin Exp $");
+
+#include    <machine/setjmp.h>
+
+// int _setjmp(struct jmp_buffer *)
+//
+//  Setup a non-local goto.
+//
+// Description:
+//
+//  SetJump stores the current register set in the area pointed to
+//  by "save".  It returns zero.  Subsequent calls to "LongJump" will
+//  restore the registers and return non-zero to the same location.
+//
+// On entry, r32 contains the pointer to the jmp_buffer
+//
+
+ENTRY(_setjmp, 1)
+    add     r10 = J_PREDS, r32  // skip Unats & pfs save area
+    add     r11 = J_BSP, r32
+    //
+    //  save immediate context
+    //
+    mov     r2 = ar.bsp         // save backing store pointer
+    mov     r3 = pr             // save predicates
+    flushrs
+    ;;
+    //
+    // save user Unat register
+    //
+    mov     r16 = ar.lc         // save loop count register
+    mov     r14 = ar.unat       // save user Unat register
+
+    st8     [r10] = r3, J_LC-J_PREDS
+    st8     [r11] = r2, J_R4-J_BSP
+    ;;
+    st8     [r10] = r16, J_R5-J_LC
+    st8     [r32] = r14, J_NATS // Note: Unat at the 
+                                // beginning of the save area
+    mov     r15 = ar.pfs
+    ;;
+    //
+    //  save preserved general registers & NaT's
+    //
+    .mem.offset 0,0
+    st8.spill   [r11] = r4, J_R6-J_R4
+    .mem.offset 8,0
+    st8.spill   [r10] = r5, J_R7-J_R5
+    ;;
+    .mem.offset 16,0
+    st8.spill   [r11] = r6, J_SP-J_R6
+    .mem.offset 24,0
+    st8.spill   [r10] = r7, J_F3-J_R7 
+    ;;
+    st8.spill   [r11] = sp, J_F2-J_SP
+    mov            r16 = ar.rsc
+    ;;
+    //
+    // save spilled Unat and pfs registers
+    //
+    mov     r2 = ar.unat        // save Unat register after spill
+    mov        ar.rsc = r0
+    ;;
+    st8     [r32] = r2, J_PFS-J_NATS    // save unat for spilled regs
+    mov     r17 = ar.rnat
+    ;;
+    st8     [r32] = r15, J_RNAT-J_PFS  // save pfs
+    mov            ar.rsc = r16
+    //
+    //  save floating registers 
+    //
+    stf.spill   [r11] = f2, J_F4-J_F2
+    stf.spill   [r10] = f3, J_F5-J_F3 
+    ;;
+    stf.spill   [r11] = f4, J_F16-J_F4
+    stf.spill   [r10] = f5, J_F17-J_F5 
+    ;;
+    stf.spill   [r11] = f16, J_F18-J_F16
+    stf.spill   [r10] = f17, J_F19-J_F17 
+    ;;
+    stf.spill   [r11] = f18, J_F20-J_F18
+    stf.spill   [r10] = f19, J_F21-J_F19 
+    ;;
+    stf.spill   [r11] = f20, J_F22-J_F20
+    stf.spill   [r10] = f21, J_F23-J_F21 
+    ;;
+    stf.spill   [r11] = f22, J_F24-J_F22
+    stf.spill   [r10] = f23, J_F25-J_F23 
+    ;;
+    stf.spill   [r11] = f24, J_F26-J_F24
+    stf.spill   [r10] = f25, J_F27-J_F25 
+    ;;
+    stf.spill   [r11] = f26, J_F28-J_F26
+    stf.spill   [r10] = f27, J_F29-J_F27 
+    ;;
+    stf.spill   [r11] = f28, J_F30-J_F28
+    stf.spill   [r10] = f29, J_F31-J_F29 
+    ;;
+    stf.spill   [r11] = f30, J_FPSR-J_F30
+    stf.spill   [r10] = f31, J_B0-J_F31     // size of f31 + fpsr
+    ;;
+    st8     [r32] = r17
+    //
+    // save FPSR register & branch registers
+    //
+    mov     r2 = ar.fpsr    // save fpsr register
+    mov     r3 = b0 
+    ;;
+    st8     [r11] = r2, J_B1-J_FPSR
+    st8     [r10] = r3, J_B2-J_B0
+    mov     r2 = b1
+    mov     r3 = b2 
+    ;;
+    st8     [r11] = r2, J_B3-J_B1
+    st8     [r10] = r3, J_B4-J_B2
+    mov     r2 = b3
+    mov     r3 = b4 
+    ;;
+    st8     [r11] = r2, J_B5-J_B3
+    st8     [r10] = r3
+    mov     r2 = b5 
+    ;;
+    st8     [r11] = r2
+    ;;
+    //
+    // return
+    //
+    mov     r8 = r0         // return 0 from setjmp
+    mov     ar.unat = r14   // restore unat
+    br.ret.sptk b0
+
+END(_setjmp)
+
+
+//
+// void _longjmp(struct jmp_buffer *, int val)
+//
+//  Perform a non-local goto.
+//
+// Description:
+//
+//  LongJump initializes the register set to the values saved by a
+//  previous 'SetJump' and jumps to the return location saved by that
+//  'SetJump'.  This has the effect of unwinding the stack and returning
+//  for a second time to the 'SetJump'.
+//
+
+ENTRY(_longjmp, 2)
+    mov     r14 = ar.rsc        // get user RSC conf
+    mov     r8 = r33            // return value
+    add     r10 = J_PFS, r32    // get address of pfs
+    ;;
+    mov     ar.rsc = r0
+    add     r11 = J_NATS, r32
+    add     r17 = J_RNAT, r32



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