[src/trunk]: src/sys/arch/arm/allwinner Correct the mmc clock. Banana Pi can...

[skrll <skrll%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/f5c274b03809
branches:  trunk
changeset: 331808:f5c274b03809
user:      skrll <skrll%NetBSD.org@localhost>
date:      Sun Aug 24 21:42:06 2014 +0000

description:
Correct the mmc clock.  Banana Pi can now find an SD card.

diffstat:

 sys/arch/arm/allwinner/awin_mmc.c |  24 ++++++++++--------------
 sys/arch/arm/allwinner/awin_reg.h |   3 ++-
 2 files changed, 12 insertions(+), 15 deletions(-)

diffs (76 lines):

diff -r 757903de3146 -r f5c274b03809 sys/arch/arm/allwinner/awin_mmc.c
--- a/sys/arch/arm/allwinner/awin_mmc.c Sun Aug 24 21:15:35 2014 +0000
+++ b/sys/arch/arm/allwinner/awin_mmc.c Sun Aug 24 21:42:06 2014 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: awin_mmc.c,v 1.3 2014/02/26 02:01:02 jmcneill Exp $ */
+/* $NetBSD: awin_mmc.c,v 1.4 2014/08/24 21:42:06 skrll Exp $ */
 
 /*-
  * Copyright (c) 2014 Jared D. McNeill <jmcneill%invisible.ca@localhost>
@@ -29,7 +29,7 @@
 #include "locators.h"
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: awin_mmc.c,v 1.3 2014/02/26 02:01:02 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: awin_mmc.c,v 1.4 2014/08/24 21:42:06 skrll Exp $");
 
 #include <sys/param.h>
 #include <sys/bus.h>
@@ -87,7 +87,7 @@
        int sc_mmc_present;
 
        device_t sc_sdmmc_dev;
-       unsigned int sc_pll5_freq;
+       unsigned int sc_pll_freq;
        unsigned int sc_mod_clk;
 
        bool sc_has_gpio_detect;
@@ -129,7 +129,7 @@
        int n, k, p, div;
 
        val = bus_space_read_4(aio->aio_core_bst, aio->aio_ccm_bsh,
-           AWIN_PLL5_CFG_REG);
+           AWIN_PLL6_CFG_REG);
 
        n = (val >> 8) & 0x1f;
        k = ((val >> 4) & 3) + 1;
@@ -137,20 +137,16 @@
 
        freq = 24000000 * n * k / p;
 
-       sc->sc_pll5_freq = freq;
-       if (sc->sc_pll5_freq > 400000000) {
-               div = 4;
-       } else {
-               div = 3;
-       }
-       sc->sc_mod_clk = sc->sc_pll5_freq / (div + 1);
+       sc->sc_pll_freq = freq;
+       div = ((sc->sc_pll_freq + 99999999) / 100000000) - 1;
+       sc->sc_mod_clk = sc->sc_pll_freq / (div + 1);
 
-       awin_reg_set_clear(aio->aio_core_bst, aio->aio_ccm_bsh,
+       bus_space_write_4(aio->aio_core_bst, aio->aio_ccm_bsh,
            AWIN_SD0_CLK_REG + (sc->sc_mmc_number * 8),
-           AWIN_PLL_CFG_ENABLE | AWIN_PLL_CFG_EXG_MODE | div, 0);
+           AWIN_PLL_CFG_ENABLE | AWIN_PLL_CFG_PLL6 | div);
 
 #ifdef AWIN_MMC_DEBUG
-       aprint_normal_dev(sc->sc_dev, "PLL5 @ %u Hz\n", freq);
+       aprint_normal_dev(sc->sc_dev, "PLL6 @ %u Hz\n", freq);
 #endif
 }
 
diff -r 757903de3146 -r f5c274b03809 sys/arch/arm/allwinner/awin_reg.h
--- a/sys/arch/arm/allwinner/awin_reg.h Sun Aug 24 21:15:35 2014 +0000
+++ b/sys/arch/arm/allwinner/awin_reg.h Sun Aug 24 21:42:06 2014 +0000
@@ -720,7 +720,8 @@
 
 #define AWIN_PLL_CFG_ENABLE            __BIT(31)
 #define AWIN_PLL_CFG_BYPASS            __BIT(30)
-#define AWIN_PLL_CFG_EXG_MODE          __BIT(25)
+#define AWIN_PLL_CFG_PLL5              __BIT(25)
+#define AWIN_PLL_CFG_PLL6              __BIT(24)
 #define AWIN_PLL_CFG_OUT_EXP_DIVP      __BITS(17,16)
 #define AWIN_PLL_CFG_FACTOR_N          __BITS(12,8)
 #define AWIN_PLL_CFG_FACTOR_K          __BITS(5,4)