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[src/trunk]: src/sys/arch/arm/omap Trailing whitespace



details:   https://anonhg.NetBSD.org/src/rev/a045c39d5a4a
branches:  trunk
changeset: 336717:a045c39d5a4a
user:      skrll <skrll%NetBSD.org@localhost>
date:      Fri Mar 13 07:57:08 2015 +0000

description:
Trailing whitespace

diffstat:

 sys/arch/arm/omap/if_cpsw.c    |  6 +++---
 sys/arch/arm/omap/if_cpswreg.h |  4 ++--
 2 files changed, 5 insertions(+), 5 deletions(-)

diffs (48 lines):

diff -r d36f8866236a -r a045c39d5a4a sys/arch/arm/omap/if_cpsw.c
--- a/sys/arch/arm/omap/if_cpsw.c       Fri Mar 13 05:29:26 2015 +0000
+++ b/sys/arch/arm/omap/if_cpsw.c       Fri Mar 13 07:57:08 2015 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: if_cpsw.c,v 1.7 2015/02/01 19:32:59 christos Exp $     */
+/*     $NetBSD: if_cpsw.c,v 1.8 2015/03/13 07:57:08 skrll Exp $        */
 
 /*
  * Copyright (c) 2013 Jonathan A. Kollasch
@@ -53,7 +53,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(1, "$NetBSD: if_cpsw.c,v 1.7 2015/02/01 19:32:59 christos Exp $");
+__KERNEL_RCSID(1, "$NetBSD: if_cpsw.c,v 1.8 2015/03/13 07:57:08 skrll Exp $");
 
 #include <sys/param.h>
 #include <sys/bus.h>
@@ -1460,7 +1460,7 @@
        for (i = 0; i < CPSW_MAX_ALE_ENTRIES; i++) {
                cpsw_ale_read_entry(sc, i, ale_entry);
 
-               /* Entry Type[61:60] is 0 for free entry */ 
+               /* Entry Type[61:60] is 0 for free entry */
                if (free_index < 0 && ((ale_entry[1] >> 28) & 3) == 0) {
                        free_index = i;
                }
diff -r d36f8866236a -r a045c39d5a4a sys/arch/arm/omap/if_cpswreg.h
--- a/sys/arch/arm/omap/if_cpswreg.h    Fri Mar 13 05:29:26 2015 +0000
+++ b/sys/arch/arm/omap/if_cpswreg.h    Fri Mar 13 07:57:08 2015 +0000
@@ -132,7 +132,7 @@
 
 /* Interrupt offsets */
 #define CPSW_INTROFF_RXTH      0
-#define CPSW_INTROFF_RX                1 
+#define CPSW_INTROFF_RX                1
 #define CPSW_INTROFF_TX                2
 #define CPSW_INTROFF_MISC      3
 
@@ -166,7 +166,7 @@
 #define GMIISEL_RGMII2_IDMODE  __BIT32(5)
 #define GMIISEL_RGMII1_IDMODE  __BIT32(4)
 #define GMIISEL_GMII2_SEL(val) ((0x3 & (val)) << 2)
-#define GMIISEL_GMII1_SEL(val) ((0x3 & (val)) << 0)    
+#define GMIISEL_GMII1_SEL(val) ((0x3 & (val)) << 0)
 #define GMII_MODE      0
 #define RMII_MODE      1
 #define RGMII_MODE     2



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