[src/trunk]: src/sys/arch/mips/mips on o32 kernels with MIPS3 use mips3_sd() ...

[macallan <macallan%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/65c5cc0eff55
branches:  trunk
changeset: 336367:65c5cc0eff55
user:      macallan <macallan%NetBSD.org@localhost>
date:      Fri Feb 27 14:44:16 2015 +0000

description:
on o32 kernels with MIPS3 use mips3_sd() and mips3_ld() in *read*_8()
and *write*_8() methods
needed by sgimips, some O2 registers can only be properly written in
64bit chunks

diffstat:

 sys/arch/mips/mips/bus_space_alignstride_chipdep.c |  24 ++++++++++++++++++++-
 1 files changed, 22 insertions(+), 2 deletions(-)

diffs (77 lines):

diff -r 32bd58da2b1a -r 65c5cc0eff55 sys/arch/mips/mips/bus_space_alignstride_chipdep.c
--- a/sys/arch/mips/mips/bus_space_alignstride_chipdep.c        Fri Feb 27 13:18:11 2015 +0000
+++ b/sys/arch/mips/mips/bus_space_alignstride_chipdep.c        Fri Feb 27 14:44:16 2015 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: bus_space_alignstride_chipdep.c,v 1.22 2015/02/13 14:11:12 macallan Exp $ */
+/* $NetBSD: bus_space_alignstride_chipdep.c,v 1.23 2015/02/27 14:44:16 macallan Exp $ */
 
 /*-
  * Copyright (c) 1998, 2000, 2001 The NetBSD Foundation, Inc.
@@ -86,7 +86,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: bus_space_alignstride_chipdep.c,v 1.22 2015/02/13 14:11:12 macallan Exp $");
+__KERNEL_RCSID(0, "$NetBSD: bus_space_alignstride_chipdep.c,v 1.23 2015/02/27 14:44:16 macallan Exp $");
 
 #ifdef CHIP_EXTENT
 #include <sys/extent.h>
@@ -97,6 +97,10 @@
 
 #include <uvm/uvm_extern.h>
 
+#if defined(__mips_o32) && defined(MIPS3)
+#define NEED_64BIT_ASM
+#endif
+
 #define        __C(A,B)        __CONCAT(A,B)
 #define        __S(S)          __STRING(S)
 
@@ -737,7 +741,11 @@
         h += CHIP_OFF64(off);
         shift = (h & (CHIP_ACCESS_SIZE - 1)) * 8;
         ptr = (void *)(h & ~((bus_space_handle_t)(CHIP_ACCESS_SIZE - 1)));
+#ifdef NEED_64BIT_ASM
+       r =  CHIP_SWAP64(mips3_ld(ptr) >> shift);
+#else
        r =  CHIP_SWAP64(*ptr >> shift);
+#endif
 
        return r;
 }
@@ -843,7 +851,11 @@
         h += CHIP_OFF64(off);
         shift = (h & (CHIP_ACCESS_SIZE - 1)) * 8;
         ptr = (void *)(h & ~((bus_space_handle_t)(CHIP_ACCESS_SIZE - 1)));
+#ifdef NEED_64BIT_ASM
+       mips3_sd(ptr, CHIP_SWAP64(val) << shift);
+#else
        *ptr = CHIP_SWAP64(val) << shift;
+#endif
 }
 
 #define CHIP_write_multi_N(BYTES,TYPE)                                 \
@@ -983,7 +995,11 @@
        volatile uint64_t *ptr;
 
        ptr = (void *)(intptr_t)(h + CHIP_OFF64(off));
+#ifdef NEED_64BIT_ASM
+       return mips3_ld(ptr);
+#else
        return *ptr;
+#endif
 }
 
 #define CHIP_read_multi_stream_N(BYTES,TYPE)                           \
@@ -1068,7 +1084,11 @@
        volatile uint64_t *ptr;
 
        ptr = (void *)(intptr_t)(h + CHIP_OFF64(off));
+#ifdef NEED_64BIT_ASM
+       mips3_sd(ptr, val);
+#else
        *ptr = val;
+#endif
 }
 
 #define CHIP_write_multi_stream_N(BYTES,TYPE)                          \