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[src/trunk]: src/sys/arch/arm/allwinner add some more usb regs



details:   https://anonhg.NetBSD.org/src/rev/44ec3915e34d
branches:  trunk
changeset: 332274:44ec3915e34d
user:      jmcneill <jmcneill%NetBSD.org@localhost>
date:      Sat Sep 13 17:48:00 2014 +0000

description:
add some more usb regs

diffstat:

 sys/arch/arm/allwinner/awin_reg.h |  41 +++++++++++++++++++++++++++++++++-----
 sys/arch/arm/allwinner/awin_usb.c |  24 +++++++++++-----------
 2 files changed, 47 insertions(+), 18 deletions(-)

diffs (129 lines):

diff -r a1e3a0115223 -r 44ec3915e34d sys/arch/arm/allwinner/awin_reg.h
--- a/sys/arch/arm/allwinner/awin_reg.h Sat Sep 13 17:42:48 2014 +0000
+++ b/sys/arch/arm/allwinner/awin_reg.h Sat Sep 13 17:48:00 2014 +0000
@@ -160,6 +160,9 @@
 
 #define AWIN_SRAM_CTL1_A3_A4           __BITS(5,4)
 #define AWIN_SRAM_CTL1_A3_A4_EMAC      1
+#define AWIN_SRAM_CTL1_SRAMD_MAP       __BIT(0)
+#define AWIN_SRAM_CTL1_SRAMD_MAP_CPUDMA        0
+#define AWIN_SRAM_CTL1_SRAMD_MAP_USB0  1
 
 #define AWIN_SRAM_VER_KEY_FIELD                __BITS(31,16)
 #define AWIN_SRAM_VER_R_EN             __BIT(15)
@@ -1025,18 +1028,44 @@
 #define AWIN_CLK_OUT_SRC_FACTOR_M      __BITS(12,8)
 
 /* USB device offsets */
-#define AWIN_USB0_PHY_CSR_REG          0x0404
+#define AWIN_USB0_PHY_CSR_REG          0x0400
+#define AWIN_USB0_PHY_CTL_REG          0x0404
 #define AWIN_EHCI_OFFSET               0x0000
 #define AWIN_EHCI_SIZE                 0x0400
 #define AWIN_OHCI_OFFSET               0x0400
 #define AWIN_OHCI_SIZE                 0x0400
 #define AWIN_USB_PMU_IRQ_REG           0x0800
 
-#define AWIN_USB0_PHY_CSR_ADDR         __BITS(15,8)
-#define AWIN_USB0_PHY_CSR_DAT          __BIT(7)
-#define AWIN_USB0_PHY_CSR_CLK2         __BIT(2)
-#define AWIN_USB0_PHY_CSR_CLK1         __BIT(1)
-#define AWIN_USB0_PHY_CSR_CLK0         __BIT(0)
+#define AWIN_USB0_PHY_CSR_VBUS_VALID_DATA      __BIT(30)
+#define AWIN_USB0_PHY_CSR_VBUS_VALID_VBUS      __BIT(29)
+#define AWIN_USB0_PHY_CSR_EXT_ID_STATUS                __BIT(28)
+#define AWIN_USB0_PHY_CSR_EXT_DM_STATUS                __BIT(27)
+#define AWIN_USB0_PHY_CSR_EXT_DP_STATUS                __BIT(26)
+#define AWIN_USB0_PHY_CSR_MERGED_VBUS_STATUS   __BIT(25)
+#define AWIN_USB0_PHY_CSR_MERGED_ID_STATUS     __BIT(24)
+#define AWIN_USB0_PHY_CSR_ID_PULLUP_EN         __BIT(17)
+#define AWIN_USB0_PHY_CSR_DPDM_PULLUP_EN       __BIT(16)
+#define AWIN_USB0_PHY_CSR_FORCE_ID             __BITS(15,14)
+#define AWIN_USB0_PHY_CSR_FORCE_ID_LOW         2
+#define AWIN_USB0_PHY_CSR_FORCE_ID_HIGH                3
+#define AWIN_USB0_PHY_CSR_FORCE_VBUS_VALID     __BITS(13,12)
+#define AWIN_USB0_PHY_CSR_FORCE_VBUS_VALID_LOW 2
+#define AWIN_USB0_PHY_CSR_FORCE_VBUS_VALID_HIGH        3
+#define AWIN_USB0_PHY_CSR_VBUS_VALID_SRC       __BITS(11,10)
+#define AWIN_USB0_PHY_CSR_HOSC_EN              __BIT(7)
+#define AWIN_USB0_PHY_CSR_VBUS_CHANGE_DET      __BIT(6)
+#define AWIN_USB0_PHY_CSR_ID_CHANGE_DET                __BIT(5)
+#define AWIN_USB0_PHY_CSR_DPDM_CHANGE_DET      __BIT(4)
+#define AWIN_USB0_PHY_CSR_IRQ_EN               __BIT(3)
+#define AWIN_USB0_PHY_CSR_VBUS_CHANGE_DET_EN   __BIT(2)
+#define AWIN_USB0_PHY_CSR_ID_CHANGE_DET_EN     __BIT(1)
+#define AWIN_USB0_PHY_CSR_DPDM_CHANGE_DET_EN   __BIT(0)
+
+#define AWIN_USB0_PHY_CTL_ADDR         __BITS(15,8)
+#define AWIN_USB0_PHY_CTL_DAT          __BIT(7)
+#define AWIN_USB0_PHY_CTL_CLK2         __BIT(2)
+#define AWIN_USB0_PHY_CTL_CLK1         __BIT(1)
+#define AWIN_USB0_PHY_CTL_CLK0         __BIT(0)
 
 #define AWIN_USB_PMU_IRQ_AHB_INCR8     __BIT(10)
 #define AWIN_USB_PMU_IRQ_AHB_INCR4     __BIT(9)
diff -r a1e3a0115223 -r 44ec3915e34d sys/arch/arm/allwinner/awin_usb.c
--- a/sys/arch/arm/allwinner/awin_usb.c Sat Sep 13 17:42:48 2014 +0000
+++ b/sys/arch/arm/allwinner/awin_usb.c Sat Sep 13 17:48:00 2014 +0000
@@ -34,7 +34,7 @@
 
 #include <sys/cdefs.h>
 
-__KERNEL_RCSID(1, "$NetBSD: awin_usb.c,v 1.12 2014/06/24 05:07:31 skrll Exp $");
+__KERNEL_RCSID(1, "$NetBSD: awin_usb.c,v 1.13 2014/09/13 17:48:00 jmcneill Exp $");
 
 #include <sys/param.h>
 #include <sys/bus.h>
@@ -236,33 +236,33 @@
 {
        bus_space_tag_t bst = usbsc->usbsc_bst;
        bus_space_handle_t bsh = usbsc->usbsc_usb0_phy_csr_bsh;
-       uint32_t clk = AWIN_USB0_PHY_CSR_CLK0 << usbsc->usbsc_number;
+       uint32_t clk = AWIN_USB0_PHY_CTL_CLK0 << usbsc->usbsc_number;
 
        uint32_t v = bus_space_read_4(bst, bsh, 0);
 
-       KASSERT((v & AWIN_USB0_PHY_CSR_CLK0) == 0);
-       KASSERT((v & AWIN_USB0_PHY_CSR_CLK1) == 0);
-       KASSERT((v & AWIN_USB0_PHY_CSR_CLK2) == 0);
+       KASSERT((v & AWIN_USB0_PHY_CTL_CLK0) == 0);
+       KASSERT((v & AWIN_USB0_PHY_CTL_CLK1) == 0);
+       KASSERT((v & AWIN_USB0_PHY_CTL_CLK2) == 0);
 
-       v &= ~AWIN_USB0_PHY_CSR_ADDR;
-       v &= ~AWIN_USB0_PHY_CSR_DAT;
+       v &= ~AWIN_USB0_PHY_CTL_ADDR;
+       v &= ~AWIN_USB0_PHY_CTL_DAT;
 
-       v |= __SHIFTIN(bit_addr, AWIN_USB0_PHY_CSR_ADDR);
+       v |= __SHIFTIN(bit_addr, AWIN_USB0_PHY_CTL_ADDR);
 
        /*
         * Bitbang the data to the phy, bit by bit, incrementing bit address
         * as we go.
         */
        for (; len > 0; bit_addr++, bits >>= 1, len--) {
-               v |= __SHIFTIN(bits & 1, AWIN_USB0_PHY_CSR_DAT);
+               v |= __SHIFTIN(bits & 1, AWIN_USB0_PHY_CTL_DAT);
                bus_space_write_4(bst, bsh, 0, v);
                delay(1);
                bus_space_write_4(bst, bsh, 0, v | clk);
                delay(1);
                bus_space_write_4(bst, bsh, 0, v);
                delay(1);
-               v += __LOWEST_SET_BIT(AWIN_USB0_PHY_CSR_ADDR);
-               v &= ~AWIN_USB0_PHY_CSR_DAT;
+               v += __LOWEST_SET_BIT(AWIN_USB0_PHY_CTL_ADDR);
+               v &= ~AWIN_USB0_PHY_CTL_DAT;
        }
 }
 
@@ -335,7 +335,7 @@
            loc->loc_offset + AWIN_OHCI_OFFSET, AWIN_OHCI_SIZE,
            &usbsc->usbsc_ohci_bsh);
        bus_space_subregion(usbsc->usbsc_bst, aio->aio_core_bsh,
-           AWIN_USB0_OFFSET + AWIN_USB0_PHY_CSR_REG, 4,
+           AWIN_USB0_OFFSET + AWIN_USB0_PHY_CTL_REG, 4,
            &usbsc->usbsc_usb0_phy_csr_bsh);
 
        aprint_naive("\n");



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