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[src/trunk]: src PR/49584: Leonardo Taccari: alc(4): add support for AR816x/A...



details:   https://anonhg.NetBSD.org/src/rev/d8237af25ee7
branches:  trunk
changeset: 335628:d8237af25ee7
user:      christos <christos%NetBSD.org@localhost>
date:      Sun Jan 18 15:30:03 2015 +0000

description:
PR/49584: Leonardo Taccari: alc(4): add support for AR816x/AR817x chipsets

diffstat:

 share/man/man4/alc.4    |    28 +-
 share/man/man4/atphy.4  |     6 +-
 share/man/man4/lii.4    |     8 +-
 sys/dev/pci/if_alc.c    |  1028 ++++++++++++++++++++++++++++++++++++++++------
 sys/dev/pci/if_alcreg.h |   319 ++++++++++++++-
 sys/dev/pci/pcidevs     |     3 +-
 6 files changed, 1237 insertions(+), 155 deletions(-)

diffs (truncated from 2126 to 300 lines):

diff -r fbaf1a8eae25 -r d8237af25ee7 share/man/man4/alc.4
--- a/share/man/man4/alc.4      Sat Jan 17 23:49:40 2015 +0000
+++ b/share/man/man4/alc.4      Sun Jan 18 15:30:03 2015 +0000
@@ -1,4 +1,4 @@
-.\"    $NetBSD: alc.4,v 1.3 2011/12/14 13:24:14 njoly Exp $
+.\"    $NetBSD: alc.4,v 1.4 2015/01/18 15:30:03 christos Exp $
 .\"
 .\" Copyright (c) 2009 Kevin Lo <kevlo%openbsd.org@localhost>
 .\"
@@ -14,12 +14,12 @@
 .\" ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
 .\" OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
 .\"
-.Dd February 22, 2011
+.Dd January 18, 2015
 .Dt ALC 4
 .Os
 .Sh NAME
 .Nm alc
-.Nd Atheros AR813x/AR815x Ethernet device
+.Nd Atheros AR813x/AR815x/AR816x/AR817x Ethernet device
 .Sh SYNOPSIS
 .Cd "alc* at pci?"
 .Cd "atphy* at mii?"
@@ -27,7 +27,7 @@
 The
 .Nm
 driver provides support for Ethernet interfaces based on the
-Atheros AR8131/AR8132/AR8151/AR8152 Ethernet chipsets.
+Atheros AR813x/AR815x/AR816x/AR817x Gigabit/Fast Ethernet chipsets.
 .Pp
 The following
 .Ar media
@@ -41,7 +41,7 @@
 .It Cm 100baseTX
 Set 100Mbps (Fast Ethernet) operation.
 .It Cm 1000baseT
-Set 1000Mbps (Gigabit Ethernet) operation (AR8131/AR8151 only).
+Set 1000Mbps (Gigabit Ethernet) operation.
 .El
 .Pp
 For more information on configuring this device, see
@@ -57,5 +57,19 @@
 .Sh HISTORY
 The
 .Nm
-device driver first appeared in
-.Nx 6.0 .
+device driver was written by
+.An Pyun YongHyeon
+and first appeared in
+.Fx 8.0 . It was ported to
+.Ox 4.7
+by
+.An Kevin Lo
+and then ported to
+.Nx 6.0
+by
+.An Fire Crow .
+.An Leonardo Taccari
+ported the AR816x/AR817x support for
+.Nm
+from
+.Fx 11.0 .
diff -r fbaf1a8eae25 -r d8237af25ee7 share/man/man4/atphy.4
--- a/share/man/man4/atphy.4    Sat Jan 17 23:49:40 2015 +0000
+++ b/share/man/man4/atphy.4    Sun Jan 18 15:30:03 2015 +0000
@@ -1,4 +1,4 @@
-.\"    $NetBSD: atphy.4,v 1.2 2009/01/16 23:26:31 wiz Exp $
+.\"    $NetBSD: atphy.4,v 1.3 2015/01/18 15:30:03 christos Exp $
 .\"    $OpenBSD: atphy.4,v 1.1 2008/09/26 21:39:34 brad Exp $
 .\"
 .\" Copyright (c) 2008 Brad Smith <brad%comstyle.com@localhost>
@@ -15,7 +15,7 @@
 .\" ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
 .\" OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
 .\"
-.Dd January 16, 2009
+.Dd January 18, 2015
 .Dt ATPHY 4
 .Os
 .Sh NAME
@@ -29,7 +29,9 @@
 driver supports the Attansic Technology F1 10/100/1000 Ethernet PHY.
 .Sh SEE ALSO
 .Xr age 4 ,
+.Xr alc 4 ,
 .Xr ifmedia 4 ,
 .Xr intro 4 ,
+.Xr lii 4 ,
 .Xr mii 4 ,
 .Xr ifconfig 8
diff -r fbaf1a8eae25 -r d8237af25ee7 share/man/man4/lii.4
--- a/share/man/man4/lii.4      Sat Jan 17 23:49:40 2015 +0000
+++ b/share/man/man4/lii.4      Sun Jan 18 15:30:03 2015 +0000
@@ -1,4 +1,4 @@
-.\" $NetBSD: lii.4,v 1.2 2008/04/30 13:10:54 martin Exp $
+.\" $NetBSD: lii.4,v 1.3 2015/01/18 15:30:03 christos Exp $
 .\"
 .\" Copyright (c) 2008 The NetBSD Foundation, Inc.
 .\" All rights reserved.
@@ -27,7 +27,7 @@
 .\" ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 .\" POSSIBILITY OF SUCH DAMAGE.
 .\"
-.Dd March 29, 2008
+.Dd January 18, 2015
 .Dt LII 4
 .Os
 .Sh NAME
@@ -42,8 +42,8 @@
 This card is found in a variety of low-end Asus hardware, notably the
 Asus EeePC.
 .Sh SEE ALSO
-.Xr mii 4 ,
-.Xr ukphy 4
+.Xr atphy 4 ,
+.Xr mii 4
 .Sh HISTORY
 The
 .Nm
diff -r fbaf1a8eae25 -r d8237af25ee7 sys/dev/pci/if_alc.c
--- a/sys/dev/pci/if_alc.c      Sat Jan 17 23:49:40 2015 +0000
+++ b/sys/dev/pci/if_alc.c      Sun Jan 18 15:30:03 2015 +0000
@@ -95,6 +95,16 @@
                "Atheros AR8152 v1.1 PCIe Fast Ethernet" },
        { PCI_VENDOR_ATTANSIC, PCI_PRODUCT_ATTANSIC_AR8152_B2, 6 * 1024,
                "Atheros AR8152 v2.0 PCIe Fast Ethernet" },
+       { PCI_VENDOR_ATTANSIC, PCI_PRODUCT_ATTANSIC_AR8161, 9 * 1024,
+               "Atheros AR8161 PCIe Gigabit Ethernet" },
+       { PCI_VENDOR_ATTANSIC, PCI_PRODUCT_ATTANSIC_AR8162, 9 * 1024,
+               "Atheros AR8162 PCIe Fast Ethernet" },
+       { PCI_VENDOR_ATTANSIC, PCI_PRODUCT_ATTANSIC_AR8171, 9 * 1024,
+               "Atheros AR8171 PCIe Gigabit Ethernet" },
+       { PCI_VENDOR_ATTANSIC, PCI_PRODUCT_ATTANSIC_AR8172, 9 * 1024,
+               "Atheros AR8172 PCIe Fast Ethernet" },
+       { PCI_VENDOR_ATTANSIC, PCI_PRODUCT_ATTANSIC_E2200, 9 * 1024,
+               "Killer E2200 Gigabit Ethernet" },
        { 0, 0, 0, NULL },
 };
 
@@ -110,14 +120,20 @@
 static int     alc_mediachange(struct ifnet *);
 static void    alc_mediastatus(struct ifnet *, struct ifmediareq *);
 
-static void    alc_aspm(struct alc_softc *, int);
+static void    alc_aspm(struct alc_softc *, int, int);
+static void    alc_aspm_813x(struct alc_softc *, int);
+static void    alc_aspm_816x(struct alc_softc *, int);
 static void    alc_disable_l0s_l1(struct alc_softc *);
 static int     alc_dma_alloc(struct alc_softc *);
 static void    alc_dma_free(struct alc_softc *);
+static void    alc_dsp_fixup(struct alc_softc *, int);
 static int     alc_encap(struct alc_softc *, struct mbuf **);
 static struct alc_ident *
                alc_find_ident(struct pci_attach_args *);
 static void    alc_get_macaddr(struct alc_softc *);
+static void    alc_get_macaddr_813x(struct alc_softc *);
+static void    alc_get_macaddr_816x(struct alc_softc *);
+static void    alc_get_macaddr_par(struct alc_softc *);
 static void    alc_init_cmb(struct alc_softc *);
 static void    alc_init_rr_ring(struct alc_softc *);
 static int     alc_init_rx_ring(struct alc_softc *, bool);
@@ -125,12 +141,22 @@
 static void    alc_init_tx_ring(struct alc_softc *);
 static int     alc_intr(void *);
 static void    alc_mac_config(struct alc_softc *);
+static uint32_t        alc_mii_readreg_813x(struct alc_softc *, int, int);
+static uint32_t        alc_mii_readreg_816x(struct alc_softc *, int, int);
+static void    alc_mii_writereg_813x(struct alc_softc *, int, int, int);
+static void    alc_mii_writereg_816x(struct alc_softc *, int, int, int);
 static int     alc_miibus_readreg(device_t, int, int);
 static void    alc_miibus_statchg(struct ifnet *);
 static void    alc_miibus_writereg(device_t, int, int, int);
+static uint32_t        alc_miidbg_readreg(struct alc_softc *, int);
+static void    alc_miidbg_writereg(struct alc_softc *, int, int);
+static uint32_t        alc_miiext_readreg(struct alc_softc *, int, int);
+static uint32_t        alc_miiext_writereg(struct alc_softc *, int, int, int);
 static int     alc_newbuf(struct alc_softc *, struct alc_rxdesc *, bool);
 static void    alc_phy_down(struct alc_softc *);
 static void    alc_phy_reset(struct alc_softc *);
+static void    alc_phy_reset_813x(struct alc_softc *);
+static void    alc_phy_reset_816x(struct alc_softc *);
 static void    alc_reset(struct alc_softc *);
 static void    alc_rxeof(struct alc_softc *, struct rx_rdesc *);
 static int     alc_rxintr(struct alc_softc *);
@@ -160,12 +186,34 @@
 alc_miibus_readreg(device_t dev, int phy, int reg)
 {
        struct alc_softc *sc = device_private(dev);
+       int v;
+
+       if ((sc->alc_flags & ALC_FLAG_AR816X_FAMILY) != 0)
+               v = alc_mii_readreg_816x(sc, phy, reg);
+       else
+               v = alc_mii_readreg_813x(sc, phy, reg);
+       return (v);
+}
+
+static uint32_t
+alc_mii_readreg_813x(struct alc_softc *sc, int phy, int reg)
+{
        uint32_t v;
        int i;
 
        if (phy != sc->alc_phyaddr)
                return (0);
 
+       /*
+        * For AR8132 fast ethernet controller, do not report 1000baseT
+        * capability to mii(4). Even though AR8132 uses the same
+        * model/revision number of F1 gigabit PHY, the PHY has no
+        * ability to establish 1000baseT link.
+        */
+       if ((sc->alc_flags & ALC_FLAG_FASTETHER) != 0 &&
+           reg == MII_EXTSR)
+               return 0;
+
        CSR_WRITE_4(sc, ALC_MDIO, MDIO_OP_EXECUTE | MDIO_OP_READ |
            MDIO_SUP_PREAMBLE | MDIO_CLK_25_4 | MDIO_REG_ADDR(reg));
        for (i = ALC_PHY_TIMEOUT; i > 0; i--) {
@@ -184,16 +232,56 @@
        return ((v & MDIO_DATA_MASK) >> MDIO_DATA_SHIFT);
 }
 
+static uint32_t
+alc_mii_readreg_816x(struct alc_softc *sc, int phy, int reg)
+{
+       uint32_t clk, v;
+       int i;
+
+       if (phy != sc->alc_phyaddr)
+               return (0);
+
+       if ((sc->alc_flags & ALC_FLAG_LINK) != 0)
+               clk = MDIO_CLK_25_128;
+       else
+               clk = MDIO_CLK_25_4;
+       CSR_WRITE_4(sc, ALC_MDIO, MDIO_OP_EXECUTE | MDIO_OP_READ |
+           MDIO_SUP_PREAMBLE | clk | MDIO_REG_ADDR(reg));
+       for (i = ALC_PHY_TIMEOUT; i > 0; i--) {
+               DELAY(5);
+               v = CSR_READ_4(sc, ALC_MDIO);
+               if ((v & MDIO_OP_BUSY) == 0)
+                       break;
+       }
+
+       if (i == 0) {
+               printf("%s: phy read timeout: phy %d, reg %d\n",
+                   device_xname(sc->sc_dev), phy, reg);
+               return (0);
+       }
+
+       return ((v & MDIO_DATA_MASK) >> MDIO_DATA_SHIFT);
+}
+
 static void
 alc_miibus_writereg(device_t dev, int phy, int reg, int val)
 {
        struct alc_softc *sc = device_private(dev);
+
+       if ((sc->alc_flags & ALC_FLAG_AR816X_FAMILY) != 0)
+               alc_mii_writereg_816x(sc, phy, reg, val);
+       else
+               alc_mii_writereg_813x(sc, phy, reg, val);
+
+       return;
+}
+
+static void
+alc_mii_writereg_813x(struct alc_softc *sc, int phy, int reg, int val)
+{
        uint32_t v;
        int i;
 
-       if (phy != sc->alc_phyaddr)
-               return;
-
        CSR_WRITE_4(sc, ALC_MDIO, MDIO_OP_EXECUTE | MDIO_OP_WRITE |
            (val & MDIO_DATA_MASK) << MDIO_DATA_SHIFT |
            MDIO_SUP_PREAMBLE | MDIO_CLK_25_4 | MDIO_REG_ADDR(reg));
@@ -207,6 +295,35 @@
        if (i == 0)
                printf("%s: phy write timeout: phy %d, reg %d\n",
                    device_xname(sc->sc_dev), phy, reg);
+
+       return;
+}
+
+static void
+alc_mii_writereg_816x(struct alc_softc *sc, int phy, int reg, int val)
+{
+       uint32_t clk, v;
+       int i;
+
+       if ((sc->alc_flags & ALC_FLAG_LINK) != 0)
+               clk = MDIO_CLK_25_128;
+       else
+               clk = MDIO_CLK_25_4;
+       CSR_WRITE_4(sc, ALC_MDIO, MDIO_OP_EXECUTE | MDIO_OP_WRITE |



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