[src/trunk]: src/sys/arch/arm/rockchip obio_init_gpio: set pin direction to o...

[jmcneill <jmcneill%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/9257d7832291
branches:  trunk
changeset: 335285:9257d7832291
user:      jmcneill <jmcneill%NetBSD.org@localhost>
date:      Thu Jan 01 18:59:03 2015 +0000

description:
obio_init_gpio: set pin direction to output before writing data

diffstat:

 sys/arch/arm/rockchip/obio.c |  16 ++++++++--------
 1 files changed, 8 insertions(+), 8 deletions(-)

diffs (47 lines):

diff -r 85af3f5da5ac -r 9257d7832291 sys/arch/arm/rockchip/obio.c
--- a/sys/arch/arm/rockchip/obio.c      Thu Jan 01 18:25:52 2015 +0000
+++ b/sys/arch/arm/rockchip/obio.c      Thu Jan 01 18:59:03 2015 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: obio.c,v 1.7 2015/01/01 18:25:52 jmcneill Exp $        */
+/*     $NetBSD: obio.c,v 1.8 2015/01/01 18:59:03 jmcneill Exp $        */
 
 /*
  * Copyright (c) 2001, 2002, 2003 Wasabi Systems, Inc.
@@ -38,7 +38,7 @@
 #include "opt_rockchip.h"
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: obio.c,v 1.7 2015/01/01 18:25:52 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: obio.c,v 1.8 2015/01/01 18:59:03 jmcneill Exp $");
 
 #include <sys/param.h>
 #include <sys/systm.h>
@@ -237,22 +237,22 @@
 {
 #if 1
        /* Radxa Rock */
+       obio_swporta(ROCKCHIP_GPIO0_OFFSET, GPIO_SWPORTA_DD_OFFSET, __BIT(3));
        obio_swporta(ROCKCHIP_GPIO0_OFFSET, GPIO_SWPORTA_DR_OFFSET, __BIT(3));
-       obio_swporta(ROCKCHIP_GPIO0_OFFSET, GPIO_SWPORTA_DD_OFFSET, __BIT(3));
+       obio_swporta(ROCKCHIP_GPIO2_OFFSET, GPIO_SWPORTA_DD_OFFSET, __BIT(31));
        obio_swporta(ROCKCHIP_GPIO2_OFFSET, GPIO_SWPORTA_DR_OFFSET, __BIT(31));
-       obio_swporta(ROCKCHIP_GPIO2_OFFSET, GPIO_SWPORTA_DD_OFFSET, __BIT(31));
 
        /* IT66121 HDMI */
+       obio_swporta(ROCKCHIP_GPIO3_OFFSET, GPIO_SWPORTA_DD_OFFSET, __BIT(10));
        obio_swporta(ROCKCHIP_GPIO3_OFFSET, GPIO_SWPORTA_DR_OFFSET, __BIT(10));
-       obio_swporta(ROCKCHIP_GPIO3_OFFSET, GPIO_SWPORTA_DD_OFFSET, __BIT(10));
 #else
        /* ChipSPARK Rayeager PX2 */
+       obio_swporta(ROCKCHIP_GPIO0_OFFSET, GPIO_SWPORTA_DD_OFFSET, __BIT(5));
        obio_swporta(ROCKCHIP_GPIO0_OFFSET, GPIO_SWPORTA_DR_OFFSET, __BIT(5));
-       obio_swporta(ROCKCHIP_GPIO0_OFFSET, GPIO_SWPORTA_DD_OFFSET, __BIT(5));
+       obio_swporta(ROCKCHIP_GPIO0_OFFSET, GPIO_SWPORTA_DD_OFFSET, __BIT(6));
        obio_swporta(ROCKCHIP_GPIO0_OFFSET, GPIO_SWPORTA_DR_OFFSET, __BIT(6));
-       obio_swporta(ROCKCHIP_GPIO0_OFFSET, GPIO_SWPORTA_DD_OFFSET, __BIT(6));
+       obio_swporta(ROCKCHIP_GPIO1_OFFSET, GPIO_SWPORTA_DD_OFFSET, __BIT(31));
        obio_swporta(ROCKCHIP_GPIO1_OFFSET, GPIO_SWPORTA_DR_OFFSET, __BIT(31));
-       obio_swporta(ROCKCHIP_GPIO1_OFFSET, GPIO_SWPORTA_DD_OFFSET, __BIT(31));
 #endif
 }