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[src/trunk]: src/sys/arch Map all of core0 and core1 space and let drivers us...
details: https://anonhg.NetBSD.org/src/rev/e46d014038a9
branches: trunk
changeset: 335118:e46d014038a9
user: jmcneill <jmcneill%NetBSD.org@localhost>
date: Fri Dec 26 19:44:48 2014 +0000
description:
Map all of core0 and core1 space and let drivers use bus_space_subregion
instead of bus_space_map. Fill in rockchip_reset.
diffstat:
sys/arch/arm/rockchip/files.rockchip | 11 +++--
sys/arch/arm/rockchip/obio.c | 47 ++++++++++++++---------
sys/arch/arm/rockchip/obio_com.c | 52 +++++++++++++++-----------
sys/arch/arm/rockchip/rockchip_board.c | 57 +++++++++++++++++++++++++++++
sys/arch/arm/rockchip/rockchip_dwctwo.c | 17 ++------
sys/arch/arm/rockchip/rockchip_reg.h | 39 ++++++++++---------
sys/arch/arm/rockchip/rockchip_var.h | 12 ++++-
sys/arch/evbarm/rockchip/rockchip_machdep.c | 22 +++++++---
8 files changed, 171 insertions(+), 86 deletions(-)
diffs (truncated from 544 to 300 lines):
diff -r 2a50a0d73bf4 -r e46d014038a9 sys/arch/arm/rockchip/files.rockchip
--- a/sys/arch/arm/rockchip/files.rockchip Fri Dec 26 19:15:04 2014 +0000
+++ b/sys/arch/arm/rockchip/files.rockchip Fri Dec 26 19:44:48 2014 +0000
@@ -1,4 +1,4 @@
-# $NetBSD: files.rockchip,v 1.1 2014/12/26 16:53:33 jmcneill Exp $
+# $NetBSD: files.rockchip,v 1.2 2014/12/26 19:44:48 jmcneill Exp $
#
# Configuration info for Rockchip ARM Peripherals
#
@@ -11,6 +11,7 @@
file arch/arm/arm32/arm32_reboot.c
file arch/arm/arm32/irq_dispatch.S
+file arch/arm/rockchip/rockchip_board.c
file arch/arm/rockchip/rockchip_space.c obio
#file arch/arm/rockchip/rockchip_a4x_space.c obio
file arch/arm/rockchip/rockchip_dma.c
@@ -25,11 +26,11 @@
attach com at obio with obiouart
file arch/arm/rockchip/obio_com.c obiouart
-# SDHC
-#attach sdhc at obio with rksdhc
-#file arch/arm/rockchip/rockchip_sdhc.c rksdhc
+# SD/MMC (Synopsys DesignWare)
+attach dwcmmc at obio with rkdwcmmc
+file arch/arm/rockchip/rockchip_dwcmmc.c rkdwcmmc
-# USB OTG (Synopsys DesignWave OTG)
+# USB OTG (Synopsys DesignWare OTG)
attach dwctwo at obio with rkdwctwo
file arch/arm/rockchip/rockchip_dwctwo.c rkdwctwo needs-flag
diff -r 2a50a0d73bf4 -r e46d014038a9 sys/arch/arm/rockchip/obio.c
--- a/sys/arch/arm/rockchip/obio.c Fri Dec 26 19:15:04 2014 +0000
+++ b/sys/arch/arm/rockchip/obio.c Fri Dec 26 19:44:48 2014 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: obio.c,v 1.1 2014/12/26 16:53:33 jmcneill Exp $ */
+/* $NetBSD: obio.c,v 1.2 2014/12/26 19:44:48 jmcneill Exp $ */
/*
* Copyright (c) 2001, 2002, 2003 Wasabi Systems, Inc.
@@ -36,7 +36,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: obio.c,v 1.1 2014/12/26 16:53:33 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: obio.c,v 1.2 2014/12/26 19:44:48 jmcneill Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -100,14 +100,16 @@
obio_print(void *aux, const char *pnp)
{
struct obio_attach_args *obio = aux;
+ bus_addr_t addr = obio->obio_base + obio->obio_offset;
- aprint_normal(": addr 0x%08lx", obio->obio_addr);
- aprint_normal("-0x%08lx", obio->obio_addr + (obio->obio_size - 1));
+ aprint_normal(": addr 0x%08lx", addr);
+ aprint_normal("-0x%08lx", addr + (obio->obio_size - 1));
if (obio->obio_width != OBIOCF_WIDTH_DEFAULT)
aprint_normal(" width %d", obio->obio_width);
if (obio->obio_intr != OBIOCF_INTR_DEFAULT)
aprint_normal(" intr %d", obio->obio_intr);
- aprint_normal(" mult %d", obio->obio_mult);
+ if (obio->obio_mult != OBIOCF_MULT_DEFAULT)
+ aprint_normal(" mult %d", obio->obio_mult);
return UNCONF;
}
@@ -116,21 +118,33 @@
obio_search(device_t parent, cfdata_t cf, const int *ldesc, void *aux)
{
struct obio_attach_args obio;
+ bus_addr_t addr = cf->cf_loc[OBIOCF_ADDR];
- obio.obio_addr = cf->cf_loc[OBIOCF_ADDR];
+ if (addr >= ROCKCHIP_CORE0_BASE &&
+ addr < ROCKCHIP_CORE0_BASE + ROCKCHIP_CORE0_SIZE) {
+ obio.obio_base = ROCKCHIP_CORE0_BASE;
+ obio.obio_bsh = rockchip_core0_bsh;
+ } else if (addr >= ROCKCHIP_CORE1_BASE &&
+ addr < ROCKCHIP_CORE1_BASE + ROCKCHIP_CORE1_SIZE) {
+ obio.obio_base = ROCKCHIP_CORE1_BASE;
+ obio.obio_bsh = rockchip_core1_bsh;
+ } else {
+ panic("addr %#llx is not in CORE0 or CORE1 space",
+ (long long unsigned int)addr);
+ }
+ obio.obio_offset = addr - obio.obio_base;
obio.obio_size = cf->cf_loc[OBIOCF_SIZE];
obio.obio_width = cf->cf_loc[OBIOCF_WIDTH];
obio.obio_intr = cf->cf_loc[OBIOCF_INTR];
obio.obio_mult = cf->cf_loc[OBIOCF_MULT];
obio.obio_dmat = &rockchip_bus_dma_tag;
-
switch (cf->cf_loc[OBIOCF_MULT]) {
case 1:
- obio.obio_iot = &rockchip_bs_tag;
+ obio.obio_bst = &rockchip_bs_tag;
break;
case 4:
- obio.obio_iot = &rockchip_a4x_bs_tag;
+ obio.obio_bst = &rockchip_a4x_bs_tag;
break;
default:
panic("Unsupported EMIFS multiplier.");
@@ -160,16 +174,14 @@
bus_space_tag_t bt = &rockchip_bs_tag;
int old, renew;
- if (bus_space_map(bt, ROCKCHIP_GRF_BASE, ROCKCHIP_GRF_SIZE, 0, &bh))
- panic("GRF can not be mapped.");
+ bus_space_subregion(bt, rockchip_core1_bsh, ROCKCHIP_GRF_OFFSET,
+ ROCKCHIP_GRF_SIZE, &bh);
old = bus_space_read_4(bt, bh, offset);
bus_space_write_4(bt, bh, offset, (old | new | 0xffff0000));
renew = bus_space_read_4(bt, bh, offset);
printf("grf iomux: old %08x, new %08x, renew %08x\n", old, new, renew);
-
- bus_space_unmap(bt, bh, ROCKCHIP_GRF_SIZE);
}
#define GPIO_SWPORTA_DR_OFFSET 0x00
@@ -177,8 +189,8 @@
void obio_init_gpio(void)
{
- obio_swporta(ROCKCHIP_GPIO0_BASE, GPIO_SWPORTA_DR_OFFSET, __BIT(3));
- obio_swporta(ROCKCHIP_GPIO0_BASE, GPIO_SWPORTA_DD_OFFSET, __BIT(3));
+ obio_swporta(ROCKCHIP_GPIO0_OFFSET, GPIO_SWPORTA_DR_OFFSET, __BIT(3));
+ obio_swporta(ROCKCHIP_GPIO0_OFFSET, GPIO_SWPORTA_DD_OFFSET, __BIT(3));
}
void obio_swporta(int gpio_base, int offset, int new)
@@ -188,14 +200,11 @@
int old, renew;
int gpio_size = 0x100; /* XXX */
- if (bus_space_map(bt, gpio_base, gpio_size, 0, &bh))
- panic("gpio can not be mapped.");
+ bus_space_subregion(bt, rockchip_core1_bsh, gpio_base, gpio_size, &bh);
old = bus_space_read_4(bt, bh, offset);
bus_space_write_4(bt, bh, offset, old | new);
renew = bus_space_read_4(bt, bh, offset);
printf("gpio: 0x%08x 0x%08x -> 0x%08x\n", gpio_base + offset, old, renew);
-
- bus_space_unmap(bt, bh, gpio_size);
}
diff -r 2a50a0d73bf4 -r e46d014038a9 sys/arch/arm/rockchip/obio_com.c
--- a/sys/arch/arm/rockchip/obio_com.c Fri Dec 26 19:15:04 2014 +0000
+++ b/sys/arch/arm/rockchip/obio_com.c Fri Dec 26 19:44:48 2014 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: obio_com.c,v 1.1 2014/12/26 16:53:33 jmcneill Exp $ */
+/* $NetBSD: obio_com.c,v 1.2 2014/12/26 19:44:48 jmcneill Exp $ */
/* based on omap/obio_com.c */
@@ -41,7 +41,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: obio_com.c,v 1.1 2014/12/26 16:53:33 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: obio_com.c,v 1.2 2014/12/26 19:44:48 jmcneill Exp $");
#include "opt_rockchip.h"
/*#include "opt_com.h"*/
@@ -77,10 +77,24 @@
obiouart_match(device_t parent, cfdata_t cf, void *aux)
{
struct obio_attach_args *obio = aux;
- bus_space_handle_t bh;
- int rv;
- if (obio->obio_addr == OBIOCF_ADDR_DEFAULT)
+ bus_space_handle_t bsh;
+ bus_addr_t ioaddr;
+
+ switch (obio->obio_base) {
+ case ROCKCHIP_CORE0_BASE:
+ KASSERT(obio->obio_offset == ROCKCHIP_UART0_OFFSET ||
+ obio->obio_offset == ROCKCHIP_UART1_OFFSET);
+ break;
+ case ROCKCHIP_CORE1_BASE:
+ KASSERT(obio->obio_offset == ROCKCHIP_UART2_OFFSET ||
+ obio->obio_offset == ROCKCHIP_UART3_OFFSET);
+ break;
+ default:
panic("obiouart must have addr specified in config.");
+ }
+
+ ioaddr = obio->obio_base + obio->obio_offset;
+
#if 0
/*
* XXX this should be ifdefed on a board-dependent switch
@@ -93,18 +107,13 @@
if (obio->obio_size == OBIOCF_SIZE_DEFAULT)
obio->obio_size = ROCKCHIP_UART_SIZE;
- if (com_is_console(obio->obio_iot, obio->obio_addr, NULL))
+ if (com_is_console(obio->obio_bst, ioaddr, NULL))
return 1;
- if (bus_space_map(obio->obio_iot, obio->obio_addr, obio->obio_size,
- 0, &bh))
- return 1;
+ bus_space_subregion(obio->obio_bst, obio->obio_bsh, obio->obio_size, 0,
+ &bsh);
- rv = comprobe1(obio->obio_iot, bh);
-
- bus_space_unmap(obio->obio_iot, bh, obio->obio_size);
-
- return rv;
+ return comprobe1(obio->obio_bst, bsh);
}
static void
@@ -113,24 +122,23 @@
struct com_obio_softc *osc = device_private(self);
struct com_softc *sc = &osc->sc_sc;
struct obio_attach_args *obio = aux;
- bus_space_tag_t iot;
- bus_space_handle_t ioh = 0;
+ bus_space_tag_t bst;
+ bus_space_handle_t bsh = 0;
bus_addr_t iobase;
-
sc->sc_dev = self;
- iot = obio->obio_iot;
- iobase = obio->obio_addr;
+ bst = obio->obio_bst;
+ iobase = obio->obio_base + obio->obio_offset;
sc->sc_frequency = ROCKCHIP_UART_FREQ;
sc->sc_type = COM_TYPE_NORMAL;
- if (com_is_console(iot, iobase, &ioh) == 0 &&
- bus_space_map(iot, iobase, obio->obio_size, 0, &ioh)) {
+ if (com_is_console(bst, iobase, &bsh) == 0 &&
+ bus_space_subregion(bst, obio->obio_bsh, obio->obio_size, 0, &bsh)) {
panic(": can't map registers\n");
return;
}
- COM_INIT_REGS(sc->sc_regs, iot, ioh, iobase);
+ COM_INIT_REGS(sc->sc_regs, bst, bsh, iobase);
com_attach_subr(sc);
aprint_naive("\n");
diff -r 2a50a0d73bf4 -r e46d014038a9 sys/arch/arm/rockchip/rockchip_board.c
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/sys/arch/arm/rockchip/rockchip_board.c Fri Dec 26 19:44:48 2014 +0000
@@ -0,0 +1,57 @@
+/* $NetBSD: rockchip_board.c,v 1.1 2014/12/26 19:44:48 jmcneill Exp $ */
+
+/*-
+ * Copyright (c) 2014 Jared D. McNeill <jmcneill%invisible.ca@localhost>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <sys/cdefs.h>
+__KERNEL_RCSID(0, "$NetBSD: rockchip_board.c,v 1.1 2014/12/26 19:44:48 jmcneill Exp $");
+
+#include <sys/param.h>
+#include <sys/bus.h>
+#include <sys/cpu.h>
+#include <sys/device.h>
+
+#include <arm/rockchip/rockchip_reg.h>
+#include <arm/rockchip/rockchip_var.h>
+
+bus_space_handle_t rockchip_core0_bsh;
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