Source-Changes-HG archive
[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index][Old Index]
[src/trunk]: src/sys/arch/arm/allwinner add 64-bit counter driver; it is cert...
details: https://anonhg.NetBSD.org/src/rev/ef517a1fd537
branches: trunk
changeset: 333483:ef517a1fd537
user: jmcneill <jmcneill%NetBSD.org@localhost>
date: Wed Nov 05 15:05:20 2014 +0000
description:
add 64-bit counter driver; it is certainly slower than gtmr (mutexes involved, etc) but at least it is monotonic with > 1 cpu
diffstat:
sys/arch/arm/allwinner/awin_cnt.c | 136 ++++++++++++++++++++++++++++++++++++++
sys/arch/arm/allwinner/awin_io.c | 4 +-
sys/arch/arm/allwinner/awin_reg.h | 7 +
sys/arch/arm/allwinner/files.awin | 7 +-
4 files changed, 152 insertions(+), 2 deletions(-)
diffs (206 lines):
diff -r a1407bdd29ce -r ef517a1fd537 sys/arch/arm/allwinner/awin_cnt.c
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/sys/arch/arm/allwinner/awin_cnt.c Wed Nov 05 15:05:20 2014 +0000
@@ -0,0 +1,136 @@
+/* $NetBSD: awin_cnt.c,v 1.1 2014/11/05 15:05:20 jmcneill Exp $ */
+
+/*-
+ * Copyright (c) 2014 Jared D. McNeill <jmcneill%invisible.ca@localhost>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include "opt_multiprocessor.h"
+
+#include <sys/cdefs.h>
+__KERNEL_RCSID(0, "$NetBSD: awin_cnt.c,v 1.1 2014/11/05 15:05:20 jmcneill Exp $");
+
+#include <sys/param.h>
+#include <sys/bus.h>
+#include <sys/device.h>
+#include <sys/intr.h>
+#include <sys/systm.h>
+#include <sys/kernel.h>
+#include <sys/timetc.h>
+
+#include <arm/allwinner/awin_reg.h>
+#include <arm/allwinner/awin_var.h>
+
+struct awin_cnt_softc {
+ device_t sc_dev;
+ bus_space_tag_t sc_bst;
+ bus_space_handle_t sc_bsh;
+ struct timecounter sc_tc;
+ kmutex_t sc_lock;
+};
+
+#define CNT_READ(sc, reg) \
+ bus_space_read_4((sc)->sc_bst, (sc)->sc_bsh, (reg))
+#define CNT_WRITE(sc, reg, val) \
+ bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))
+
+static int awin_cnt_match(device_t, cfdata_t, void *);
+static void awin_cnt_attach(device_t, device_t, void *);
+
+static u_int awin_cnt_get_timecount(struct timecounter *);
+
+CFATTACH_DECL_NEW(awin_cnt, sizeof(struct awin_cnt_softc),
+ awin_cnt_match, awin_cnt_attach, NULL, NULL);
+
+static int
+awin_cnt_match(device_t parent, cfdata_t cf, void *aux)
+{
+ struct awinio_attach_args * const aio = aux;
+ const struct awin_locators * const loc = &aio->aio_loc;
+
+ if (strcmp(cf->cf_name, loc->loc_name))
+ return 0;
+
+ return 1;
+}
+
+static void
+awin_cnt_attach(device_t parent, device_t self, void *aux)
+{
+ struct awin_cnt_softc *sc = device_private(self);
+ struct awinio_attach_args * const aio = aux;
+ const struct awin_locators * const loc = &aio->aio_loc;
+
+ sc->sc_dev = self;
+ sc->sc_bst = aio->aio_core_bst;
+ mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_SCHED);
+ bus_space_subregion(sc->sc_bst, aio->aio_core_bsh,
+ loc->loc_offset, loc->loc_size, &sc->sc_bsh);
+
+ aprint_naive("\n");
+ aprint_normal("\n");
+
+ /* Set OSC24M clock source */
+ uint32_t ctrl = CNT_READ(sc, AWIN_CPUCFG_CNT64_CTRL_REG);
+ ctrl &= ~AWIN_CPUCFG_CNT64_CLK_SRC_SEL;
+ CNT_WRITE(sc, AWIN_CPUCFG_CNT64_CTRL_REG, ctrl);
+
+ sc->sc_tc.tc_get_timecount = awin_cnt_get_timecount;
+ sc->sc_tc.tc_poll_pps = NULL;
+ sc->sc_tc.tc_counter_mask = ~0;
+ sc->sc_tc.tc_frequency = AWIN_REF_FREQ;
+ sc->sc_tc.tc_name = "CNT64";
+ sc->sc_tc.tc_priv = sc;
+#ifdef MULTIPROCESSOR
+ sc->sc_tc.tc_quality = 900;
+#else
+ sc->sc_tc.tc_quality = 200;
+#endif
+
+ tc_init(&sc->sc_tc);
+}
+
+static u_int
+awin_cnt_get_timecount(struct timecounter *tc)
+{
+ struct awin_cnt_softc *sc = tc->tc_priv;
+ uint32_t ctrl;
+ u_int timecount;
+
+ mutex_enter(&sc->sc_lock);
+
+ /* Enable read latch, wait for it to clear */
+ ctrl = CNT_READ(sc, AWIN_CPUCFG_CNT64_CTRL_REG);
+ ctrl |= AWIN_CPUCFG_CNT64_RL_EN;
+ CNT_WRITE(sc, AWIN_CPUCFG_CNT64_CTRL_REG, ctrl);
+ do {
+ ctrl = CNT_READ(sc, AWIN_CPUCFG_CNT64_CTRL_REG);
+ } while (ctrl & AWIN_CPUCFG_CNT64_RL_EN);
+
+ timecount = CNT_READ(sc, AWIN_CPUCFG_CNT64_LOW_REG);
+
+ mutex_exit(&sc->sc_lock);
+
+ return timecount;
+}
diff -r a1407bdd29ce -r ef517a1fd537 sys/arch/arm/allwinner/awin_io.c
--- a/sys/arch/arm/allwinner/awin_io.c Wed Nov 05 15:03:19 2014 +0000
+++ b/sys/arch/arm/allwinner/awin_io.c Wed Nov 05 15:05:20 2014 +0000
@@ -31,7 +31,7 @@
#include <sys/cdefs.h>
-__KERNEL_RCSID(1, "$NetBSD: awin_io.c,v 1.25 2014/11/05 07:56:48 martin Exp $");
+__KERNEL_RCSID(1, "$NetBSD: awin_io.c,v 1.26 2014/11/05 15:05:20 jmcneill Exp $");
#include <sys/param.h>
#include <sys/bus.h>
@@ -97,6 +97,8 @@
{ "awindma", OFFANDSIZE(DMA), NOPORT, AWIN_IRQ_DMA, A10|A20|REQ },
{ "awindma", OFFANDSIZE(DMA), NOPORT, AWIN_A31_IRQ_DMA, A31 },
{ "awintmr", OFFANDSIZE(TMR), NOPORT, AWIN_IRQ_TMR0, A10 },
+ { "awincnt", OFFANDSIZE(CPUCFG), NOPORT, NOINTR, A20 },
+ { "awincnt", OFFANDSIZE(A31_CPUCFG), NOPORT, NOINTR, A31 },
{ "com", OFFANDSIZE(UART0), 0, AWIN_IRQ_UART0, A10|A20 },
{ "com", OFFANDSIZE(UART1), 1, AWIN_IRQ_UART1, A10|A20 },
{ "com", OFFANDSIZE(UART2), 2, AWIN_IRQ_UART2, A10|A20 },
diff -r a1407bdd29ce -r ef517a1fd537 sys/arch/arm/allwinner/awin_reg.h
--- a/sys/arch/arm/allwinner/awin_reg.h Wed Nov 05 15:03:19 2014 +0000
+++ b/sys/arch/arm/allwinner/awin_reg.h Wed Nov 05 15:05:20 2014 +0000
@@ -849,6 +849,9 @@
#define AWIN_CPUCFG_CPU1_PWROFF_REG 0x01B4
#define AWIN_CPUCFG_DBGCTRL0_REG 0x01E0
#define AWIN_CPUCFG_DBGCTRL1_REG 0x01E4
+#define AWIN_CPUCFG_CNT64_CTRL_REG 0x0280
+#define AWIN_CPUCFG_CNT64_LOW_REG 0x0284
+#define AWIN_CPUCFG_CNT64_HIGH_REG 0x0288
#define AWIN_CPUCFG_CPU_RST_CTRL_CORE_RESET __BIT(1)
#define AWIN_CPUCFG_CPU_RST_CTRL_RESET __BIT(0)
@@ -865,6 +868,10 @@
#define AWIN_CPUCFG_DBGCTL0_CPU1_DBGPWRDUP __BIT(1)
#define AWIN_CPUCFG_DBGCTL0_CPU0_DBGPWRDUP __BIT(1)
+#define AWIN_CPUCFG_CNT64_CLK_SRC_SEL __BIT(2)
+#define AWIN_CPUCFG_CNT64_RL_EN __BIT(1)
+#define AWIN_CPUCFG_CNT64_CLR_EN __BIT(0)
+
#define AWIN_PLL1_CFG_REG 0x0000
#define AWIN_PLL1_TUN_REG 0x0004
#define AWIN_PLL2_CFG_REG 0x0008
diff -r a1407bdd29ce -r ef517a1fd537 sys/arch/arm/allwinner/files.awin
--- a/sys/arch/arm/allwinner/files.awin Wed Nov 05 15:03:19 2014 +0000
+++ b/sys/arch/arm/allwinner/files.awin Wed Nov 05 15:05:20 2014 +0000
@@ -1,4 +1,4 @@
-# $NetBSD: files.awin,v 1.18 2014/11/02 23:55:48 jmcneill Exp $
+# $NetBSD: files.awin,v 1.19 2014/11/05 15:05:20 jmcneill Exp $
#
# Configuration info for Allwinner ARM Peripherals
#
@@ -53,6 +53,11 @@
attach awintmr at awinio with awin_tmr
file arch/arm/allwinner/awin_tmr.c awin_tmr
+# A20/A31 64-bit counter
+device awincnt
+attach awincnt at awinio with awin_cnt
+file arch/arm/allwinner/awin_cnt.c awin_cnt
+
# A10/A20 UART
options COM_16750 # for IIR_BUSY
attach com at awinio with awin_com
Home |
Main Index |
Thread Index |
Old Index